Техническая Спецификация для Intel C2518 FH8065501516710
Модели
FH8065501516710
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
339
Volume 2—SMBus 2.0 Unit 1 - Host—C2000 Product Family
Controller Characteristics and Operation
15.4.9
Dynamic SMT Policy Update
The hardware provides a mechanism for the firmware to change the policies of the
hardware and other registers by the firmware without requiring a reset to the system.
15.4.9.1
Master Policy
For updates to master side of the registers, the firmware already has the control by
stopping the hardware DMA engine and halting new master transactions. This ensures
that the hardware master side is completely disabled and the firmware chooses to
update the policy and registers.
15.4.9.2
Target Policy
Updates to target policy require a flow, since the hardware asynchronously receives a
target cycle.
The hardware maintains current target policy internally without direct visibility to the
firmware. The firmware sees current policy by reading TPOLICY register. When
TPOLICY.PTUREQ=0, it means the current policy settings are effective in the hardware
(assuming the firmware follows flow and did not write to any other register without first
setting the PTUREQ bit). To change policy, the firmware first disables the target
completely or selectively disables addresses so while the firmware is extensively
updating registers, the hardware NACKs appropriately in the address or command
phase as desired. After that is done, the firmware must again update policy following
same flow to have the final desired policy in effect.
1. The firmware sets the intermediate policy desired by programming the TPOLICY
register with TPOLICY.PTUREQ also set.
2. When the hardware reaches the SMBus idle state, it checks if PTUREQ is:
a. If set, the hardware captures current setting of policy in PTUREQ and load into
its internal registers. It also clears the PTUREQ bit once the policy is captured.
b. If clear, the hardware continues to be in idle until another SMBus start is seen.
3. The hardware continues to act on intermediate policy resulting in NACK on address
phase or on command phase of incoming cycles (programmed by the firmware).
4. The firmware polls or reads the PTUREQ register to make sure it is clear before
reprogramming the registers, etc.
5. Once the firmware is ready to ungate the hardware, the firmware again follows step
#1 in which it sets the new policy.
6. Flow again follows steps 2-4 before the final firmware policy is set and active in the
hardware.
A conceptual flow is shown in
.