Техническая Спецификация для Intel E3815 FH8065301567411
Модели
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2756
Datasheet
20.6.65
ISD3LVI—Offset ECh
Input Stream Descriptor 3 Last Valid Index
Access Method
Default: 0000h
20.6.66
ISD3FIFOW—Offset EEh
Input Stream Descriptor 3 FIFO Eviction Watermark
Access Method
Default: 0004h
Type:
Memory Mapped I/O Register
(Size: 16 bits)
ISD3LVI:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RESE
RVED
0
LAST
_V
AL
ID
_IND
E
X
Bit
Range
Default &
Access
Description
15:8
00h
RO
RESERVED0:
reserved
7:0
00h
RW
LAST_VALID_INDEX:
The value written to this register indicates the index for the last
valid Buffer Descriptor in the BDL. After the controller has processed this descriptor it
will wrap back to the first descriptor in the list and continue processing. LVI must be at
least 1 i.e. there must be at least two valid entries in the buffer descriptor list before
DMA operations can begin. This value should only be modified when the RUN bit is 0
Type:
Memory Mapped I/O Register
(Size: 16 bits)
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
RE
SE
RVED
0
FIFO
_W
A
T
ERMARK