Техническая Спецификация для Intel E3815 FH8065301567411
Модели
FH8065301567411
SIO - I
2
C Interface
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
3827
data and commands are lost as the buffers are kept cleared when the I
2
C controller
is not enabled.
The I
2
C controller supports dynamic updating of the IC_TAR.IC_TAR and
IC_TAR.IC_10BITADDR_MASTER. The IC_TAR register
can be dynamically written to
provided the following conditions are met:
•
The I
2
C controller is not enabled (IC_ENABLE.ENABLE=0)
OR
•
The I
2
C controller is enabled (IC_ENABLE.ENABLE=1); AND the I
2
C controller is
NOT engaged in any Master (tx, rx) operation (IC_STATUS.MST_ACTIVITY=0);
AND the I
AND the I
2
C controller is enabled to operate in Master mode
(IC_CON.MASTER_MODE=1); AND there are NO entries in the TX FIFO
(IC_STATUS.TFE=1)
(IC_STATUS.TFE=1)
The I
2
C controller supports switching back and forth between reading and writing
dynamically. To transmit data, write the data to be written to the lower byte of the I
2
C
Rx/Tx Data Buffer and Command Register (IC_DATA_CMD). The IC_DATA_CMD.CMD
should be written to 0 for I
should be written to 0 for I
2
C write operations. Subsequently, a read command may be
issued by writing “don't cares” to IC_DATA_CMD.DAT register bits, and a 1 should be
written to the IC_DATA_CMD.CMD bit.
written to the IC_DATA_CMD.CMD bit.
26.3.2
Disabling the I
2
C Controller
The register IC_ENABLE allows software to unambiguously determine when the
hardware has completely shutdown in response to the IC_ENABLE.ENABLE register
being cleared from 1 to 0.
hardware has completely shutdown in response to the IC_ENABLE.ENABLE register
being cleared from 1 to 0.
Procedure
1. Define a timer interval (t
i2c_poll
) equal to 10 times the signaling period for the
highest I
2
C transfer speed used in the system and supported by the I
2
C controller.
For example, if the highest I
2
C transfer mode is 400Kb/s, then this t
i2c_poll
is 25 µs.
2. Define a maximum time-out parameter, MAX_T_POLL_COUNT, such that if any
repeated polling operation exceeds this maximum value, an error is reported.
3. Execute a blocking thread/process/function that prevents any further I
2
C master
transactions to be started by software, but allows any pending transfers to be
completed.
completed.
4. The variable POLL_COUNT is initialized to zero (0).
5. Clear IC_ENABLE.ENABLE to zero (0).
6. Read the IC_ENABLE_STATUS.IC_EN bit. Increment POLL_COUNT by one. If
POLL_COUNT >= MAX_T_POLL_COUNT, exit with the relevant error code.
7. If IC_ENABLE_STATUS.IC_EN is 1, then sleep for t
i2c_poll
and proceed to the
previous step. Otherwise, exit with a relevant success code.