Техническая Спецификация для Intel E3815 FH8065301567411
Модели
FH8065301567411
Power Management
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
91
•
C6NS implies only the core should be powergated, but the L2 cache contents
should be retained.
should be retained.
6.3.5
Package C-States
The processor supports C0, C1, and C6 power states. The following is a summary of the
general rules for package C-state entry. These apply to all package C-states unless
specified otherwise:
general rules for package C-state entry. These apply to all package C-states unless
specified otherwise:
•
Package C-state request is determined by the lowest numerical core C-state
amongst all cores.
amongst all cores.
•
A package C-state is automatically resolved by the processor depending on the
core idle power states and the status of the platform components.
core idle power states and the status of the platform components.
•
Each core can be at a lower idle power state than the package if the platform does
not grant the processor permission to enter a requested package C-state.
not grant the processor permission to enter a requested package C-state.
•
The platform may allow additional power savings to be realized in the processor.
•
For package C-states, the processor is not required to enter C0 before entering any
other C-state.
other C-state.
•
Entry in to a package C-state may be subject to auto-demotion - that is the
processor may keep the package in a shallower package C-state then requested by
the OS if the processor determines via heuristics that the shallower C-state results
in better power/performance.
processor may keep the package in a shallower package C-state then requested by
the OS if the processor determines via heuristics that the shallower C-state results
in better power/performance.
The processor exits a package C-state when a break event is detected. Depending on
the type of break event, the processor does the following:
the type of break event, the processor does the following:
•
If a core break event is received, the target core is activated and the break event
message is forwarded to the target core.
message is forwarded to the target core.
— If the break event is not masked, the target core enters the core C0 state and
the processor enters package C0.
— If the break event is masked, the processor attempts to re-enter its previous
package state.
•
If the break event was due to a memory access or snoop request.
— But the platform did not request to keep the processor in a higher package C-
state, the package returns to its previous C-state.
— And the platform requests a higher power C-state, the memory access or snoop
request is serviced and the package remains in the higher power C-state.