Справочник Пользователя для Interphase Tech 4538
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4538 Hardware Reference Manual
127
Index
B
BIST Built-in Self Test
C
Cache Line Size
Carrier Card
Channel Service Unit
Class Code
conventions
........................................................
CPM
...................................................................
I
I²O
Interrupt pin
Interrupts
ISP
J
Jumpers
L
Local Space Mapping
...........................................
–LRESETO
M
Maximum Latency
P
PCI base address registers
PCI Command
PCI configuration registers
PCI DMA Registers
PCI Interrupt Line
PCI Interrupt Pin
PCI local bus configuration registers
PCI Master Latency Timer
PCI Minimum Grant
PCI registers
PCI Status
PCI Subsystem Device ID
PCI Subsystem Vendor ID
PMC Connectors
R
Resets
Revision Identification
RTM
S
Serial EEPROM
Structure
T
T1 Transmit Pulse Shape programming
................
Transmit Pulse Shape programming
.....................
types
..................................................................
V
Vendor and Device Identification
.........................
Vital Product Data
..............................................