Инструкции Пользователя для Biostar P4TGP 775
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CHAPTER 1: INTRODUCTION
1.1 P4TPG775
F
EATURES
A. Hardware
C PU
Supports single Pentium 4 processor with the 1-MB L2 cache
and Celeron D with the 2k6K L2 chace in the 90 nm
processe s in an LGA 775 package.
and Celeron D with the 2k6K L2 chace in the 90 nm
processe s in an LGA 775 package.
Intel Platform Compatibility Guide 04B
Front side bus at the following frequency ranges:
-
-
533 MT/s (133 MHz core Clock)
-
800 MT/s (200 MHz Core Clock)
Supports
Hyper-Threading
Technology.
Chipset
North Bridge: Intel 915P.
South Bridge: Intel ICH6R.
Main Memory
Supports
DDR-333/400
Supports256-Mb,
512-Mb,
1G-Mb
DDR technologies for x8
and x16 non-ECC DDR devices.
Maximum DRAM address decode space of 4GB (assuming
32-bit addressing.)
32-bit addressing.)
Support for non-ECC memory only.
Registered DIMMs not supported.
Supe r I/O
Chip: ITE IT8712.
Low Pin Count Interface.
Provides the most commonly used legacy Super I/O
functionality.
functionality.
Environment
Control
initiatives,
- H/W
Monitor
- Fan
Speed
Controller
-
ITE's "Smart Guardian" function
Slots
3 32-bit PCI bus master slots.
3 PCI-EXPRESSx1 slots.
-
-
Bandwidth 250MB/s per direction; 500MB/s Totally
-
PCI Express supports a raw bit-rate of 2.5Gb/s on the
data pins.
data pins.
-
2X bandwidth over the traditional PCI architecture.
1 PCI-ESPRESSx16 slot.
-
-
Maximum theoretical realized bandwidth of 4GB/s
simultaneously per direction, for an aggregate of 8GB/s
totally.
simultaneously per direction, for an aggregate of 8GB/s
totally.