Справочник Пользователя для National Instruments Welding System 321645c-01
Chapter 2
Function Reference — GPCTR_Set_Application
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National Instruments Corporation
2-231
NI-DAQ FRM for PC Compatibles
To provide your timebase, you can connect your timebase source to one of the PFI pins on the
I/O connector and change
I/O connector and change
ND_SOURCE
and
ND_SOURCE_POLARITY
to the appropriate values.
You also can configure the other general-purpose counter for
ND_SINGLE_TRIG_PULSE_GNR
and set
ND_SOURCE
of this counter to
ND_OTHER_GPCTR_TC
to generate pulses with delays and intervals longer than 160 s.
application =
ND_RETRIG_PULSE_GNR
In this application, the counter is used for the generation of a retriggerable delayed pulse after
each transition on the gate input. By default, you get this by using the 20 MHz internal
timebase (
each transition on the gate input. By default, you get this by using the 20 MHz internal
timebase (
ND_INTERNAL_20_MHZ
), so the resolution of timing is 50 ns. The counter counts
down from
ND_COUNT_1
= 5 million to 0 for the delay time and then down from
ND_COUNT_2
= 10 million to 0 for the pulse generation time to generate a 0.5 s pulses after 0.25 s of delay
by default. The gate is the
by default. The gate is the
PFI9/GPCTR0_GATE I/O
connector pin for general-purpose
counter and the
PFI4/GPCTR1_GATE I/O
connector pin for general-purpose counter 1, and
the transition which initiates the pulse generation is low-to-high. All transitions of the gate
signal after you arm the counter to initiate pulse generation.
signal after you arm the counter to initiate pulse generation.
With the default 20 MHz timebase, combined with the counter width (24 bits), you can
generate pulses with a delay and length between 100 ns and 0.8 s. For 6602 and 455X devices
with counter width 32 bits, you can generate pulses with a delay and length between 100 ns
and 214 s long.
generate pulses with a delay and length between 100 ns and 0.8 s. For 6602 and 455X devices
with counter width 32 bits, you can generate pulses with a delay and length between 100 ns
and 214 s long.
For example, assume that you want to generate a pulse 200 ns long after 150 ns of delay from
every transition of the gate signal. You need to set
every transition of the gate signal. You need to set
ND_COUNT_1
to 150 ns/50 ns = 3 and
ND_COUNT_2
to 200 ns/50 ns = 4. Figure 2-21 shows the scenario of a counter used for
ND_RETRIG_PULSE_GNR
after the following programming sequence:
GPCTR_Control(deviceNumber, gpctrNum, ND_RESET)
GPCTR_Set_Application(deviceNumber, gpctrNum, ND_RETRIG_PULSE_GNR)
GPCTR_Change_Parameter(deviceNumber, gpctrNum, ND_COUNT_1, 3)
GPCTR_Change_Parameter(deviceNumber, gpctrNum, ND_COUNT_2, 4)
Select_Signal(deviceNumber, gpctrNumOut, gpctrNumOut, ND_LOW_TO_HIGH)
GPCTR_Control(deviceNumber, gpctrNum, ND_PROGRAM)
In Figure 2-21, the following behavior is present:
•
Gate is the signal present at the counter gate input.
•
Source is the signal present at the counter source input.
•
Output is the signal present at the counter output.