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Модели
AT80602002091AA
Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1
13
Intel® Xeon® Processors 5500 Series Electrical Specifications
2
Intel
®
Xeon
®
Processors 5500
Series Electrical Specifications
2.1
Processor Signaling
Intel
®
Xeon
®
Processor 5500 Series include 1366 lands, which utilize various signaling
technologies. Signals are grouped by electrical characteristics and buffer type into
various signal groups. These include Intel
various signal groups. These include Intel
®
QuickPath Interconnect, DDR3 (Reference
Clock, Command, Control and Data), Platform Environmental Control Interface (PECI),
Processor Sideband, System Reference Clock, Test Access Port (TAP), and Power/Other
signals. Refer to
Processor Sideband, System Reference Clock, Test Access Port (TAP), and Power/Other
signals. Refer to
for details.
Detailed layout, routing, and termination guidelines corresponding to these signal
groups can be found in the applicable platform design guide (Refer to
groups can be found in the applicable platform design guide (Refer to
Intel strongly recommends performing analog simulations of all interfaces. Please refer
to
to
for signal integrity model availability.
2.1.1
Intel QuickPath Interconnect
Intel Xeon Processor 5500 Series provide two Intel QuickPath Interconnect ports for
high speed serial transfer between other enabled components. Each port consists of
two uni-directional links (for transmit and receive). A differential signaling scheme is
utilized, which consists of opposite-polarity (D_P, D_N) signal pairs.
high speed serial transfer between other enabled components. Each port consists of
two uni-directional links (for transmit and receive). A differential signaling scheme is
utilized, which consists of opposite-polarity (D_P, D_N) signal pairs.
On-die termination (ODT) is included on the processor silicon and terminated to V
SS
.
illustrates the active ODT.
2.1.2
DDR3 Signal Groups
The memory interface utilizes DDR3 technology, which consists of numerous signal
groups. These include: Reference Clocks, Command Signals, Control Signals, and Data
Signals. Each group consists of numerous signals, which may utilize various signaling
technologies. Please refer to
groups. These include: Reference Clocks, Command Signals, Control Signals, and Data
Signals. Each group consists of numerous signals, which may utilize various signaling
technologies. Please refer to
for further details.
Figure 2-1. Active ODT for a Differential Link Example
T
X
R
X
R
TT
R
TT
R
TT
R
TT
Signal
Signal