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AT80602002712AA
Intel® Xeon® Processors 5500 Series Electrical Specifications
22
Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1
Some POC signals include specific timing requirements. Please refer to
for
further details.
2.1.7.4
Processor V
TT
Voltage Identification (VTT_VID) Signals
The voltage set by the VTT_VID signals is the typical reference voltage regulator (VR)
output to be delivered to the processor V
output to be delivered to the processor V
TTA
and V
TTD
lands. It is expected that one
regulator will supply all V
TTA
and V
TTD
lands. VTT_VID signals are CMOS push/pull
outputs. Please refer to
for the DC specifications for these signals.
Individual processor VTT_VID values may be calibrated during manufacturing such that
two processor units with the same core frequency may have different default VTT_VID
settings.
two processor units with the same core frequency may have different default VTT_VID
settings.
The Intel Xeon Processor 5500 Series
utilizes three voltage identification signals to
support automatic selection of power supply voltages. These correspond to
VTT_VID[4:2]. The V
VTT_VID[4:2]. The V
TT
voltage level delivered to the processor lands must also
encompass a 20 mV offset (See
; V
TT_TYP
) above the voltage level
corresponding to the state of the VTT_VID[7:0] signals (See
; VR 11.0
provide the resulting static and transient
tolerances. Please note that the maximum and minimum electrical loadlines are defined
by a 31.5 mV tolerance band above and below V
by a 31.5 mV tolerance band above and below V
TT_TYP
values.
Power source characteristics must be guaranteed to be stable whenever the supply to
the voltage regulator is stable.
the voltage regulator is stable.
Table 2-3. Power-On Configuration (POC[7:0]) Decode
Function
Bits
POC Settings
Description
VR_Key
VID[7]
0b for VR11.1
Electronic safety key
distinguishing VR11.1
Spare
VID[6]
0b (default)
Reserved for future use
CSC[2:0]
VID[5:3]
-000
-001
-010
-011
-100
-101
-111
-001
-010
-011
-100
-101
-111
Feature Disabled
ICC_MAX = 40A
ICC_MAX = 50A
1
ICC_MAX = 80A
ICC_MAX = 100A
ICC_MAX = 120A
ICC_MAX = 150A
2
Notes:
1. This setting is defined for future use; no specific Intel Xeon Processor 5500 Series SKU is defined with ICC_MAX
= 50A
2. General rule: Set PWM IMON slope to: 900mV=IMAX, where IMAX =IccMAX with one exception: for Intel Xeon
Processor W5580 set IMON slope to 900mV=180A, but for all other SKUs they have to match, as shown above.
Consult your PWM data sheet for the IMON slope setting.
Current Sensor Configuration
(CSC) programs the gain
applied to the ISENSE A/D
output. ISENSE data is then
used to dynamically calculate
current and power.
MSID[2:0]
VID[2:0]
-001
-011
-100
-101
-110
-011
-100
-101
-110
38W TDP / 40A ICC_MAX
60W TDP / 80A ICC_MAX
60W TDP / 80A ICC_MAX
80W TDP / 100A ICC_MAX
95W TDP / 120A ICC_MAX
95W TDP / 120A ICC_MAX
130W TDP / 150A ICC_MAX
MSID[2:0] signals are provided
to indicate the Market Segment
for the processor and may be
used for future processor
compatibility or keying. See
for platform timing
requirements of the MSID[2:0]
signals.