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FX Series Programmable Controllers
Devices in Detail 4
4-29
4.11.5
1 Phase Counters - User Start and Reset (C235 - C240)
These counters only use one input each.
When direction flag M8235 is ON, counter
C235 counts down. When it is OFF, C235
counts up.
When X11 is ON, C235 resets to 0 (zero). All
contacts of the counter C235 are also reset.
When X12 is ON, C235 is selected. From the
previous counter tables, the corresponding
counted input for C235 is X0. C235 therefore
counts the number of times X0 switches from
OFF to ON.
Device specification:
All of these counters are 32bit up/down ring counters. Their counting and contact 
operations are the same as normal 32bit up/down counters described on page 4-21.
When the counters current value reaches its maximum or setting value, the counters 
associated contacts are set and held when the counter is counting upwards.
However, when the counter is counting downwards the contacts are reset.
Setting range:
-2,147,483,648 to +2,147,483,647
Direction setting:
The counting direction for 1 phase counters is dependent on their corresponding flag 
M8
; where 
 is the number of the corresponding counter, (C235 to C240).
When M8
 is ON the counter counts down,
When M8
 is OFF the counter counts up.
Using the SPD instruction:
Care should be taken when using the SPD applied instruction (FNC 56). This instruction 
has both high speed counter and interrupt characteristics, therefore input devices X0 
through X5 may be used as the source device for the SPD instruction. In common with 
all high speed processes the selected source device of the SPD instruction must not 
coincide with any other high speed function which is operating, i.e. high speed counters 
or interrupts using the same input.
When the SPD instruction is used it is considered by the system to be a 1 phase high 
speed counter. This should be taken into account when summing the maximum com-
bined input signal frequencies - see the previous section.
X12
K1234
C235
RST
X10
X11
M8235
C235