Справочник Пользователя для Mitsubishi Electronics FX2NC
FX Series Programmable Controlers
Applied Instructions 5
5-84
b) When n= 2, two sets of switches are read. This configuration requires 8 consecutive inputs
taken from the head address specified in operand S. The data from the first set of switches,
i.e. those using the first 4 inputs, is read into data device D
i.e. those using the first 4 inputs, is read into data device D
2
. The data from the second set
of switches (again 4 digits) is read into data device D
2+1
.
c) The outputs used for multiplexing (D
1
) are
cycled for as long as the DSW instruction is
driven. After the completion of one reading, the
execution complete flag M8029 is set. The
number of outputs used does not depend on
the number of switches n.
driven. After the completion of one reading, the
execution complete flag M8029 is set. The
number of outputs used does not depend on
the number of switches n.
d) If the DSW instruction is suspended during mid-
operation, when it is restarted it will start from
the beginning of its cycle and not from its last
status achieved.
the beginning of its cycle and not from its last
status achieved.
e) It is recommended that transistor output units
are used with this instruction. However, if the
program technique at the right is used, relay
output units can be successfully operated as
the outputs will not be continually active.
program technique at the right is used, relay
output units can be successfully operated as
the outputs will not be continually active.
f) The DSW instruction may be used ONCE on
FX controllers with CPU versions lower than
3.07. FX units with CPU ver 3.07 or greater and
all FX
3.07. FX units with CPU ver 3.07 or greater and
all FX
2C
units can operate a maximum of TWO
DSW instructions.
5.8.4
SEGD (FNC 73)
Operation:
A si n gl e h e x a d e c i m al d i g i t ( 0 t o 9 , A t o F )
occupying the lower 4 bits of source device S is
decoded into a data format used to drive a seven
segment display. A representation of the hex digit
is then displayed. The decoded data is stored in
the lower 8 bits of destination device D. The upper
8 bits of the same device are not written to. The
diagram opposite shows the bit control of the
seven segment display. The active bits correspond
t o t h os e s e t t o 1 i n t he l o w e r 8 b i t s o f t h e
destination device D.
occupying the lower 4 bits of source device S is
decoded into a data format used to drive a seven
segment display. A representation of the hex digit
is then displayed. The decoded data is stored in
the lower 8 bits of destination device D. The upper
8 bits of the same device are not written to. The
diagram opposite shows the bit control of the
seven segment display. The active bits correspond
t o t h os e s e t t o 1 i n t he l o w e r 8 b i t s o f t h e
destination device D.
Mnemonic
Function
Operands
Program steps
S
D
SEGD
FNC 73
(Seven
segment
decoder)
FNC 73
(Seven
segment
decoder)
Hex data is
decoded into a
format used to
drive seven
segment displays
decoded into a
format used to
drive seven
segment displays
K, H
KnX, KnY, KnM, KnS,
T, C, D, V, Z
Note: Uses only the
lower 4 bits
KnX, KnY, KnM, KnS,
T, C, D, V, Z
Note: Uses only the
lower 4 bits
KnY, KnM, KnS,
T, C, D, V, Z
Note: The upper 8 bits
remain unchanged
T, C, D, V, Z
Note: The upper 8 bits
remain unchanged
SEGD,
SEGDP:
5 steps
SEGDP:
5 steps
X0
Y10
Y11
Y12
Y13
M8029
Start of repetitive operation Restart
Suspended
operation
operation
Cycle complete
Y 10 D 0
K 1
DSW X 10
M0
M8029
X0
RST
M 0
SET
M 0
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
FLAGS Zero M8020
X0
D 0 K2Y0
SEGD
[ D ]
[ S ]
B0
B1
B2
B3
B4
B5 B6
It can be seen that
B 7 i s N O T u s e d .
H e n c e B 7 o f t h e
destination device D
will always be OFF,
B 7 i s N O T u s e d .
H e n c e B 7 o f t h e
destination device D
will always be OFF,