Справочник Пользователя для National Instruments PCI-DIO-96
Chapter 6
Programming
PCI-DIO-96 User Manual
6-18
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National Instruments Corporation
Port C Status-Word Bit Definitions for Bidirectional Data Path
(Port A Only)
(Port A Only)
Address:
Base address + 03 (hex) for PPI A
Base address + 07 (hex) for PPI B
Base address + 0B (hex) for PPI C
Base address + 0F (hex) for PPI D
Base address + 0B (hex) for PPI C
Base address + 0F (hex) for PPI D
Type:
Read and write
Word Size:
8-bit
Bit Map:
Bit
Name
Description
7
OBFA*
Output Buffer for Port A—A low setting indicates
that the CPU has written data to port A.
6
INTE1
Interrupt Enable Bit for Port A Output Interrupts—
Setting this bit enables output interrupts from port A
of the 82C55A. Control this bit by setting/resetting
PC6.
of the 82C55A. Control this bit by setting/resetting
PC6.
5
IBFA
Input Buffer Acknowledgment for Port A—A high
setting indicates that data has been loaded into the
input latch of port A.
input latch of port A.
4
INTE2
Interrupt Enable Bit for Port A Input Interrupts—
Setting this bit enables input interrupts from port A
of the 82C55A. Control this bit by setting/resetting
PC4.
of the 82C55A. Control this bit by setting/resetting
PC4.
3
INTRA
Interrupt Request Status for Port A—If INTE1 and
IBFA are high, this bit is high, indicating that an
interrupt request is pending for port A input
transfers. If INTE2 and OBFA* are high, this bit is
high, indicating that an interrupt request is pending
for port A output transfers.
interrupt request is pending for port A input
transfers. If INTE2 and OBFA* are high, this bit is
high, indicating that an interrupt request is pending
for port A output transfers.
7
6
5
4
3
2
1
0
OBFA*
INTE1
IBFA
INTE2
INTRA
I/O
I/O
I/O