Справочник Пользователя для Intel ECB-865
User’s Manual
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ECB-865 User’s Manual
SDDACK#
Secondary DMA Acknowledge.
This signal directly drives the IDE device DMACK# signal. It
is asserted by PIIX4 to indicate to IDE DMA slave devices that a given data transfer cycle
(assertion of SDIOR# or SDIOW#) is a DMA data transfer cycle. This signal is used in
conjunction with the PCI bus master IDE function. It is not associated with any AT compatible
DMA channel.
If the IDE signals are configured for Primary and Secondary, this signal is connected to the
corresponding signal on the Secondary IDE connector.
If the IDE signals are configured for Primary Master and Primary Slave, these signals are used
for the Primary Slave connector.
(assertion of SDIOR# or SDIOW#) is a DMA data transfer cycle. This signal is used in
conjunction with the PCI bus master IDE function. It is not associated with any AT compatible
DMA channel.
If the IDE signals are configured for Primary and Secondary, this signal is connected to the
corresponding signal on the Secondary IDE connector.
If the IDE signals are configured for Primary Master and Primary Slave, these signals are used
for the Primary Slave connector.
PDDACT#
Primary Disk Act.
Signal from Primary IDE device indicating Primary IDE device activity. The
signal level depends on the hard disk type, normally active low.
SDDACT#
Secondary Disk Act.
Signal from Secondary IDE device indicating Secondary IDE device
activity. The signal level depends on the hard disk type, normally active low.
RESET# IDE
Reset. This signal resets all the devices that are attached to the IDE interface.
IRQ14/15
Interrupt line from hard disk. Connected directly to PC-AT bus.