Справочник Пользователя для Mitsubishi Electronics Q50UDEHCPU

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CHAPTER 6 COMMUNICATIONS AMONG CPU MODULES

6.1  C

ommunications Using the

 CPU Share

d Memory

6.1.2  C

ommunications by auto refr

esh (usin

g

 the multiple CPU h

igh speed t

ransmission ar

ea)

This section describes data communications by auto refresh using the multiple CPU high speed transmission area in 
the CPU shared memory.

Data communications by auto refresh using the multiple CPU high speed transmission area can be performed 
only when the following conditions are all met.

 • A multiple CPU high-speed main base unit (Q35DB, Q38DB, or Q312DB) is used.
 • A Universal model QCPU (except the Q00UCPU, Q01UCPU, and Q02UCPU) is used as CPU No.1.
 • At least two of the following CPU modules are used.

 • Universal model QCPU (except the Q00UCPU, Q01UCPU, and Q02UCPU)
 • Motion CPU (Q172DCPU(-S1), Q173DCPU(-S1), Q172DSCPU, or Q173DSCPU)
 • C Controller module (Q12DCCPU-V, Q24DHCCPU-V, or Q24DHCCPU-LS)

If any CPU module other than the above is mounted on the multiple CPU high-speed main base unit, set "0" to 
the auto refresh points ("Points") of the relevant CPU module in "Multiple CPU High Speed Transmission Area 
Setting" of PLC parameter.

Setting "0" to the auto refresh points of CPU No.3

If all the conditions cannot be met, use the auto refresh area in the CPU shared memory. (

Set "0" for the CPU module other
than the Universal model QCPU
(except the Q00UCPU, Q01UCPU,
and Q02UCPU), Motion CPU
(Q172DCPU(-S1), Q173DCPU(-S1),
Q172DSCPU, or Q173DSCPU), and
C Controller module (Q12DCCPU-V,
Q24DHCCPU-V or Q24DHCCPU-LS).