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MELSEC-A
7   USING FRAMES WHEN EXCHANGING DATA
(2)   Reception data and read timing
The timing when the R2 requests reading of the reception data to the
programmable controller CPU according to the end frame and reception end data
size is shown below.
The numbers in the tables indicate the reception statement and timing pattern
Nos. shown below.
Timing pattern No.
(refer to diagrams below)
                                                              Reception data
Random data section
    Setting
reception data
When
head
frame is
received
When random
data section in
reception
statement is
received
When
end
frame is
received
Remarks
Reception data size > reception end data size
2)
Reception data size 
≤ reception end data size
When reception
head frame and
reception end
frame are set
When reception end data size is 0
1)
Reception data size > reception end data size
4)
Reception data size 
≤ reception end data size
3)
When only
reception head
frame is set
When reception end data size is 0
7)
Refer to section
(1) *
1
 for details
on the data that
can be read by
the
programmable
controller CPU.
Reception data size > reception end data size
6)
Reception data size 
≤ reception end data size
5)
When only
reception end
frame is set
When reception end data size is 0
8)
: Reception start timing
: Reception complete timing
  (Read timing)
External 
device side
Random data
section
E
n
d f
ram
e
Pattern No. 1)
R2 side
Reception end 
data size
Interpreted as data other
than frame and aborted
Hea
d
 
fra
m
e
Random data section
E
n
d f
ram
e
Pattern No. 2)
Head 
fr
am
e
External 
device side
Random data
section
Pattern No. 3)
R2 side
Reception end 
data size
Interpreted as data other
than frame and aborted
Head 
fr
am
e
Random data section
Pattern No. 4)
Head 
fr
am
e
External 
device side
E
n
d f
ram
e
R2 side
Reception end 
data size
Random data section
E
n
d f
ram
e
Random data section
Pattern No. 5)
Pattern No. 6)
External 
device side
E
nd f
ram
e
R2 side
Pattern No. 7)
Pattern No. 8)
Head 
fr
am
e
Reception end data size
*
2
*
1
*
1