Справочник Пользователя для Mitsubishi Electronics FX
FX Series Programmable Controlers
Applied Instructions 5
5-28
5.3.4
DIV (FNC 23)
Operation 1: (Applicable to all units)
T h e p r i m a r y s o u r c e ( S
1
) i s d i v i d e d b y t h e
secondary source (S
2
). The result is stored in the
destination (D). Note the normal rules of algebra
apply.
apply.
Points to note:
a) When operating the DIV instruction in 16bit mode, two 16 bit data sources are divided into
each other. They produce two 16 bit results. The device identified as the destination address
is the lower of the two devices used to store the these results.
This storage device will actually contain a record of the number of whole times S
is the lower of the two devices used to store the these results.
This storage device will actually contain a record of the number of whole times S
2
will divide
into S
1
(the quotient).
The second, following destination register contains the remained left after the last whole
division (the remainder). Using the previous example with some test data:
division (the remainder). Using the previous example with some test data:
51 (D0)
÷
10 (D2) = 5(D4) 1(D5)
This result is interpreted as 5 whole divisions with 1 left over (5
×
10 + 1 = 51).
b) When operating the DIV instruction in 32 bit mode, two 32 bit data sources are divided into
each other. They produce two 32 bit results. The device identified as the destination address
is the lower of the two devices used to store the quotient and the following two devices are
used to store the remainder, i.e. if D30 was selected as the destination of 32 bit division
operation then D30, D31 would store the quotient and D32, D33 would store the remainder.
If the location of the destination device is smaller than the obtained result, then only the
portion of the result which directly maps to the destination area will be written. If bit devices
are used as the destination area, no remainder value is calculated.
is the lower of the two devices used to store the quotient and the following two devices are
used to store the remainder, i.e. if D30 was selected as the destination of 32 bit division
operation then D30, D31 would store the quotient and D32, D33 would store the remainder.
If the location of the destination device is smaller than the obtained result, then only the
portion of the result which directly maps to the destination area will be written. If bit devices
are used as the destination area, no remainder value is calculated.
c) If the value of the source device S
2
is 0 (zero) then an operation error is executed and the
operation of the DIV instruction is cancelled.
Operation 2: (Applicable units FX
(2C)
) This function is equivalent to FNC 123 EDIV. The
information regarding ‘Operation2:’ of the MUL instruction apply similarly to this second
operation of the DIV instruction (with the exception of a division being performed instead of a
multiplication). Again, only constants and double data words can be manipulated with only
DDIV, DDIVP instruction formats being valid. Answers for an operation are stored
(completely) in one pair of double (32 bits) data registers, i.e. answers are not split in to
quotient and remainder as in ‘Operation 1:’. The normal rules of algebra apply to floating
point division.
operation of the DIV instruction (with the exception of a division being performed instead of a
multiplication). Again, only constants and double data words can be manipulated with only
DDIV, DDIVP instruction formats being valid. Answers for an operation are stored
(completely) in one pair of double (32 bits) data registers, i.e. answers are not split in to
quotient and remainder as in ‘Operation 1:’. The normal rules of algebra apply to floating
point division.
Mnemonic
Function
Operands
Program steps
S1
S2
D
DIV
FNC 23
(Division)
FNC 23
(Division)
Divides one
source value by
another the result
is stored in the
destination device
source value by
another the result
is stored in the
destination device
K, H, KnX, KnY, KnM, KnS,T,
C, D, V, Z
C, D, V, Z
KnY, KnM, KnS,
T, C, D, Z(V)
T, C, D, Z(V)
DIV,DIVP:
7steps
7steps
DDIV,
DDIVP:
13 steps
DDIVP:
13 steps
See page 4-46 for more
details regarding floating
point format.
details regarding floating
point format.
Note: Z(V) may
NOT be used for
32 bit operation
NOT be used for
32 bit operation
When using M8023 to subtract floating point
data, only double word (32 bit) data registers
(D) or constants (K/H) may be used.used to
perform
data, only double word (32 bit) data registers
(D) or constants (K/H) may be used.used to
perform
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
X0
DIV
D 0
D 2
[ S1 ]
[ D ]
D 4
[ S2 ]