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FX Series Programmable Controlers
Applied Instructions 5
5-73
5.7.7
ALT (FNC 66)
Operation:
T h e   s t a t u s   o f  th e   d es t in a t io n   d e v ic e  ( D )   is
a l t e r n a t e d   o n   e v e r y   o p e r a t i o n   o f   t h e   A LT
instruction.
This means the status of each bit device will flip-
flop between ON and OFF. This will occur on every
program scan unless a pulse modifier or a program
interlock is used.
The ALT instruction is ideal for switching between
two modes of operation e.g. start and stop, on and
off etc.
5.7.8
RAMP (FNC 67)
Operation:
The RAMP instruction varies a current value (D)
between the data limits set by the user (S1and S2).
The ‘journey’ between these extreme limits takes n
program scans. The current scan number is stored
in device D+1. Once the current value of D equals
the set value of S2the execution complete flag
M8029 is set ON.
The RAMP instruction can vary both increasing
and decreasing differences between S1and S2.
Mnemonic
Function 
Operands
Program steps
D
ALT
FNC 66
(Alternate
state)
The status of the
assigned device
is inverted on
every operation of
the instruction
Y, M, S
ALT, ALTP:
3 steps
Mnemonic
Function 
Operands
Program steps
S
1
S
2
D
n
RAMP
FNC 67
(Ramp vari-
able value)
Ramps a device
from one value to
another in the
specified number
of steps
D
Note:
Device D uses two consecutive
registers identified as D and D+1
these are read only devices.
K, H
Note:
n= 1 to 
32,767
RAMP:
9 steps
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
ALT
M 0
X0
[ D ]
M0
X0
FX
0(S)
FX
0N
FX FX
(2C)
FX
2N(C)
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
PULSE-P
FX
(2C)
FX
FX
2N(C)
FX
0N
FX
0(s)
16 BIT OPERATION
FX
FX
0N
FX
0(s)
FX
(2C)
FX
2N(C)
32 BIT OPERATION
FLAGS
Operation
Complete M8029
X0
D 2
D 1
D 3
[ S1 ] [ S2 ] [ D ]
K1000
[ n ]
RAMP
n
n
[S1]
[S2]
[D]
[S2]
[S1]
[D]
S1 < S2
S1 > S2