Справочник Пользователя для Silicon Laboratories C8051F342
Rev. 0.5
107
C8051F340/1/2/3/4/5/6/7
Table 11.1. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
/RST Output Low Voltage
I
OL
= 8.5 mA, V
DD
= 2.7 to 3.6 V
0.6
V
/RST Input High Voltage
0.7 x V
DD
V
/RST Input Low Voltage
0.3 x V
DD
/RST Input Pull-Up Current
/RST = 0.0 V
25
40
µA
V
DD
POR Threshold (V
RST
)
2.40
2.55
2.70
V
Missing Clock Detector Tim-
eout
eout
Time from last system clock ris-
ing edge to reset initiation
ing edge to reset initiation
100
220
500
µs
Reset Time Delay
Delay between release of any
reset source and code execution
at location 0x0000
reset source and code execution
at location 0x0000
5.0
µs
Minimum /RST Low Time to
Generate a System Reset
Generate a System Reset
15
µs
V
DD
Monitor Turn-on Time
100
µs
V
DD
Monitor Supply Current
20
50
µA