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Clock Generator Module (CGM)

Functional Description

MC68HC908MR16/MC68HC908MR32 — Rev. 4.0

Advance Information

 

MOTOROLA

Clock Generator Module (CGM)

 117

Use this 9-step procedure to program the PLL. 

 lists the 

variables used and their meaning.

1. Choose the desired bus frequency, f

BUSDES

.

Example: f

BUSDES 

= 8 MHz

2. Calculate the desired VCO frequency, f

VCLKDES

.

f

VCLKDES

 = 4 x f

BUSDES

Example: f

VCLKDES

 = 4 x 8 MHz = 32 MHz

3. Using a reference frequency, f

RCLK

, equal to the crystal frequency, 

calculate the VCO frequency multiplier, N. Round the result to the 
nearest integer.

4. Calculate the VCO frequency, f

VCLK

.

f

BUSDES

Desired bus clock frequency

f

VCLKDES

Desired VCO clock frequency

f

RCLK

Chosen reference crystal frequency

f

VCLK

Calculated VCO clock frequency

f

BUS

Calculated bus clock frequency

f

NOM

Nominal VCO center frequency

f

VRS

Shifted FCO center frequency

f

VCLKDES

f

RCLK

N =

Example: N =

32 MHz

4 MHz

= 8 MHz

f

VCLK

 = N x f

RCLK

Example: f

VCLK

 = 8 x 4 MHz = 32 MHz