Справочник ПользователяСодержаниеTable of Contents7Features9Aspire X1300/X1301 Tour11Front Pane11Rear Panel13Internal Components14System LED Indicators15System Tour9Phoenix BIOS Setup Utility17Entering BIOS setup18Navigating Through the Setup Utility18Setup Utility Menus19System Utilities17Disassembly Requirements41Pre-disassembly Procedure42Main Unit Disassembly43External Modules Disassembly Flowchart43Removing the Side Panel44Removing the Font Bezel45Removing the Heat Sink Fan Assembly46Removing the Processor48Removing the Optical Drive50Removing the Hard Disk Drive52Removing the Power Supply56Removing the Memory Modules59Removing the PCI Card61Removing the Front I/O and Card Reader Boards63Removing the Mainboard67System Disassembly41Hardware Diagnostic Procedure69System Check Procedures70Power System Check70System External Inspection70System Internal Inspection70POST Error and Beep Codes711 Blank out screen712 Clear CMOS error flag711 Clear 8042 interface712 Initialize 8042 self-test711 Test special keyboard controller for Winbond 977 series Super I/O chips712 Enabled keyboard interface711 Disable PS/2 mouse interface (optional)712 Auto detect ports for keyboard and mouse followed by a port and interface swap (optional)713 Reset keyboard for Winbond 977 series Super I/O chops711 Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute.722 Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead.721 If Early_Init_Onboard_Generator is not defined Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots.722 Init onboard PWM723 Init onboard H/W monitor devices721 Program CPU internal MTRR (P6 & PII) for 0-640K memory address.722 Initialize the APIC for Pentium class CPU.723 Program early chipset according to CMOS setup. Example: onboard IDE controller. Measure CPU speed.721 Initialize double-byte language font (Optional)732 Put information on screen display, including Award title, CPU type, CPU speed, full screen logo.731 Calculate total memory by testing the last double word of each 64K page.732 Program write allocation for AMD K5 CPU.731 Program MTRR of M1 CPU732 Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range733 Initialize the APIC for P6 class CPU734 On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical731 Display PnP logo742 Early ISA PnP initialization741 Initialize Init_Onboard_Super_IO742 Initialize Init_Onbaord_AUDIO741 Assign resources to all ISA PnP devices.742 Auto assign ports to onboard COM ports if the corresponding item in Setup is set to “AUTO”.741 Initialize floppy controller742 Set up floppy related fields in 40:hardware741 Call chipset power management hook752 Recover the text fond used by EPA logo (not for full screen logo)753 If password is set, ask for password751 USB final Initialization752 Switch screen back to text mode751 Assign IRQs to PCI devices752 Set up ACPI table at top of the memory751 Invoke all ISA adapter ROMs752 Invoke all PCI ROMs (except VGA)751 Enable/Disable Parity Check according to CMOS setup752 APM Initialization751 Enable L2 cache762 Program Daylight Saving763 Program boot up speed764 Chipset final initialization765 Power management final initialization766 Clear screen & display summary table767 Program K6 write allocation768 Program P6 class write combining761 Build MP table762 Build & update ESCD763 Set CMOS century to 20h or 19h764 Load CMOS time into DOS timer tick765 Build MSIRQ routing table76Online Support Information77System Troubleshooting69System Block Diagram79Board Layout80Mainboard80System Jumpers81System Block Diagram and Board Layout79Aspire X1300/X1301 Exploded Diagram84Aspire X1300/X1301 FRU List85FRU (Field Replaceable Unit) List83Technical Specifications95Размер: 4,4 МБСтраницы: 100Язык: EnglishПросмотреть
