Справочник ПользователяСодержаниеFunctional Description1Selection Guide1Logic Block Diagram - CY7C1471BV33 (2M x 36)2Logic Block Diagram - CY7C1473BV33 (4M x 18)2Logic Block Diagram - CY7C1475BV33 (1M x 72)3Pin Configuration4Pin Definitions8Functional Overview9Single Read Accesses9Burst Read Accesses9Single Write Accesses10Burst Write Accesses10Sleep Mode10Interleaved Burst Address Table10Linear Burst Address Table10ZZ Mode Electrical Characteristics10Truth Table11The read/write truth table for CY7C1471BV33 follows.[1, 2, 8]12Truth Table for Read/Write12Truth Table for Read/Write12Truth Table for Read/Write12IEEE 1149.1 Serial Boundary Scan (JTAG)13Disabling the JTAG Feature13Test Access Port (TAP)13Test Clock (TCK)13Test MODE SELECT (TMS)13Test Data-In (TDI)13Test Data-Out (TDO)13PERFORMING A TAP RESET13TAP REGISTERS13NSTRUCTION REGISTER13BYPASS REGISTER13BOUNDARY SCAN REGISTER13IDENTIFICATION (ID) REGISTER13TAP Instruction Set14OVERVIEW14EXTEST14IDCODE14SAMPLE Z14SAMPLE/PRELOAD14BYPASS14RESERVED14TAP Controller State Diagram15TAP Controller Block Diagram163.3V TAP AC Test Conditions173.3V TAP AC Output Load Equivalent172.5V TAP AC Test Conditions172.5V TAP AC Output Load Equivalent17TAP DC Electrical Characteristics and Operating Conditions17TAP AC Switching Characteristics18TAP Timing18Identification Register Definitions19Scan Register Sizes19Identification Codes19Boundary Scan Exit Order (2M x 36)20Boundary Scan Exit Order (4M x 18)20Boundary Scan Exit Order (1M x 72)21Maximum Ratings22Operating Range22Electrical Characteristics22Capacitance23Thermal Resistance23Switching Waveforms25Ordering Information28Package Diagrams29Document History Page32Размер: 901,3 КБСтраницы: 32Язык: EnglishПросмотреть
