Инструкции для Intel 4 515/515J

Содержание

• Contents

  3
• Revision History

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• Intel® Pentium® 4 Processors 570/571, 560/561, 550/551, 540/541, 530/531, and 520/521

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• 1 Introduction

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  • 1.1 Terminology

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    • 1.1.1 Processor Packaging Terminology

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  • 1.2 References

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• 2 Electrical Specifications

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  • 2.1 FSB and GTLREF

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  • 2.2 Power and Ground Lands

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  • 2.3 Decoupling Guidelines

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    • 2.3.1 VCC Decoupling

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    • 2.3.2 FSB GTL+ Decoupling

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    • 2.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking

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  • 2.4 Voltage Identification

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    • 2.4.1 Phase Lock Loop (PLL) Power and Filter

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  • 2.5 Reserved, Unused, FC and TESTHI Signals

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  • 2.6 FSB Signal Groups

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  • 2.7 GTL+ Asynchronous Signals

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  • 2.8 Test Access Port (TAP) Connection

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  • 2.9 FSB Frequency Select Signals (BSEL[2:0])

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  • 2.10 Absolute Maximum and Minimum Ratings

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  • 2.11 Processor DC Specifications

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  • 2.12 VCC Overshoot Specification

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    • 2.12.1 Die Voltage Validation

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  • 2.13 GTL+ FSB Specifications

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• 3 Package Mechanical Specifications

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  • 3.1 Package Mechanical Drawing

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  • 3.2 Processor Component Keep-Out Zones

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  • 3.3 Package Loading Specifications

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  • 3.4 Package Handling Guidelines

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  • 3.5 Package Insertion Specifications

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  • 3.6 Processor Mass Specification

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  • 3.7 Processor Materials

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  • 3.8 Processor Markings

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  • 3.9 Processor Land Coordinates

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• 4 Land Listing and Signal Descriptions

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  • 4.1 Processor Land Assignments

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  • 4.2 Alphabetical Signals Reference

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• 5 Thermal Specifications and Design Considerations

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  • 5.1 Processor Thermal Specifications

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    • 5.1.1 Thermal Specifications

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    • 5.1.2 Thermal Metrology

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  • 5.2 Processor Thermal Features

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    • 5.2.1 Thermal Monitor

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    • 5.2.2 Thermal Monitor 2

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    • 5.2.3 On-Demand Mode

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    • 5.2.4 PROCHOT# Signal

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    • 5.2.5 THERMTRIP# Signal

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    • 5.2.6 TCONTROL and Fan Speed Reduction

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    • 5.2.7 Thermal Diode

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• 6 Features

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  • 6.1 Power-On Configuration Options

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  • 6.2 Clock Control and Low Power States

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    • 6.2.1 Normal State

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    • 6.2.2 HALT and Enhanced HALT Powerdown States

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      • 6.2.2.1 HALT Powerdown State

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      • 6.2.2.2 Enhanced HALT Powerdown State

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    • 6.2.3 Stop-Grant State

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    • 6.2.4 Enhanced HALT Snoop or HALT Snoop State, Grant Snoop State

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      • 6.2.4.1 HALT Snoop State, Grant Snoop State

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      • 6.2.4.2 Enhanced HALT Snoop State

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• 7 Boxed Processor Specifications

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  • 7.1 Mechanical Specifications

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    • 7.1.1 Boxed Processor Cooling Solution Dimensions

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    • 7.1.2 Boxed Processor Fan Heatsink Weight

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    • 7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly

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  • 7.2 Electrical Requirements

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    • 7.2.1 Fan Heatsink Power Supply

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  • 7.3 Thermal Specifications

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    • 7.3.1 Boxed Processor Cooling Requirements

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    • 7.3.2 Variable Speed Fan

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