Справочник Пользователя (HH80562PH0678M)СодержаниеContents3Figures5Tables6Revision History7Intel® Core™2 Extreme Quad-Core Processor QX6000 and Intel® Core™2 Quad Processor Q6000 Sequence Features8Intel® Core™2 Extreme Quad-Core Processor QX6000D Sequence and Intel® Core™2 Quad Processor Q6000D Sequence11 Introduction91.1 Terminology91.1.1 Processor Terminology101.2 References11Table 1. References112 Electrical Specifications132.1 Power and Ground Lands132.2 Decoupling Guidelines132.2.1 VCC Decoupling132.2.2 VTT Decoupling132.2.3 FSB Decoupling142.3 Voltage Identification14Table 2. Voltage Identification Definition152.4 Reserved, Unused, and TESTHI Signals162.5 Voltage and Current Specification172.5.1 Absolute Maximum and Minimum Ratings17Table 3. Absolute Maximum and Minimum Ratings172.5.2 DC Voltage and Current Specification18Table 4. Voltage and Current Specifications18Table 5. VCC Static and Transient Tolerance19Figure 1. VCC Static and Transient Tolerance202.5.3 VCC Overshoot21Table 6. VCC Overshoot Specifications21Figure 2. VCC Overshoot Example Waveform212.5.4 Die Voltage Validation212.6 Signaling Specifications222.6.1 FSB Signal Groups22Table 7. FSB Signal Groups (Sheet 1 of 2)22Table 8. Signal Characteristics23Table 9. Signal Reference Voltages232.6.2 CMOS and Open Drain Signals242.6.3 Processor DC Specifications24Table 10. GTL+ Signal Group DC Specifications24Table 11. Open Drain and TAP Output Signal Group DC Specifications24Table 12. CMOS Signal Group DC Specifications25Table 13. PECI DC Electrical Limits252.6.3.1 GTL+ Front Side Bus Specifications26Table 14. GTL+ Bus Voltage Definitions262.7 Clock Specifications262.7.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking26Table 15. Core Frequency to FSB Multiplier Configuration262.7.2 FSB Frequency Select Signals (BSEL[2:0])27Table 16. BSEL[2:0] Frequency Table for BCLK[1:0]272.7.3 Phase Lock Loop (PLL) and Filter272.7.4 BCLK[1:0] Specifications28Table 17. Front Side Bus Differential BCLK Specifications28Table 18. FSB Differential Clock Specifications (1066 MHz FSB)28Table 19. FSB Differential Clock Specifications (1333 MHz FSB)29Figure 3. Differential Clock Waveform29Figure 4. Differential Clock Crosspoint Specification30Figure 5. Differential Measurements303 Package Mechanical Specifications31Figure 6. Processor Package Assembly Sketch313.1 Package Mechanical Drawing31Figure 7. Processor Package Drawing Sheet 1 of 332Figure 8. Processor Package Drawing Sheet 2 of 333Figure 9. Processor Package Drawing Sheet 3 of 3343.2 Processor Component Keep-Out Zones353.3 Package Loading Specifications35Table 20. Processor Loading Specifications353.4 Package Handling Guidelines35Table 21. Package Handling Guidelines353.5 Package Insertion Specifications363.6 Processor Mass Specification363.7 Processor Materials36Table 22. Processor Materials363.8 Processor Markings36Figure 10. Processor Top-Side Markings Example for 1066 MHz Processors36Figure 11. Processor Top-Side Markings Example for 1333 MHz Processors373.9 Processor Land Coordinates38Figure 12. Processor Land Coordinates and Quadrants (Top View)384 Land Listing and Signal Descriptions394.1 Processor Land Assignments39Figure 13. land-out Diagram (Top View - Left Side)40Figure 14. land-out Diagram (Top View - Right Side)41Table 23. Alphabetical Land Assignments42Table 24. Numerical Land Assignment524.2 Alphabetical Signals Reference62Table 25. Signal Description (Sheet 1 of 9)625 Thermal Specifications and Design Considerations715.1 Processor Thermal Specifications715.1.1 Thermal Specifications71Table 26. Processor Thermal Specifications72Table 27. Thermal Profile for 130 W Processors73Figure 15. Thermal Profile for 130 W Processors73Table 28. Thermal Profile for 105 W Processors74Figure 16. Thermal Profile for 105 W Processors74Table 29. Thermal Profile 95 W Processors75Figure 17. Thermal Profile 95 W Processors755.1.2 Thermal Metrology76Figure 18. Case Temperature (TC) Measurement Location765.2 Processor Thermal Features765.2.1 Thermal Monitor765.2.2 Thermal Monitor 277Figure 19. Thermal Monitor 2 Frequency and Voltage Ordering785.2.3 On-Demand Mode785.2.4 PROCHOT# Signal795.2.5 THERMTRIP# Signal795.3 Platform Environment Control Interface (PECI)805.3.1 Introduction805.3.1.1 TCONTROL and TCC Activation on PECI-Based Systems80Figure 20. Conceptual Fan Control on PECI-Based Platforms805.3.2 PECI Specifications815.3.2.1 PECI Device Address815.3.2.2 PECI Command Support815.3.2.3 PECI Fault Handling Requirements815.3.2.4 PECI GetTemp0() and GetTemp1() Error Code Support81Table 30. GetTemp0() and GetTemp1() Error Codes816 Features836.1 Power-On Configuration Options83Table 31. Power-On Configuration Option Signals836.2 Clock Control and Low Power States83Figure 21. Processor Low Power State Machine846.2.1 Normal State846.2.2 HALT and Extended HALT Powerdown States846.2.2.1 HALT Powerdown State846.2.2.2 Extended HALT Powerdown State856.2.3 Stop Grant State856.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State866.2.4.1 HALT Snoop State, Stop Grant Snoop State866.2.4.2 Extended HALT Snoop State867 Boxed Processor Specifications87Figure 22. Mechanical Representation of the Boxed Processor877.1 Mechanical Specifications887.1.1 Boxed Processor Cooling Solution Dimensions88Figure 23. Space Requirements for the Boxed Processor (Side View)88Figure 24. Space Requirements for the Boxed Processor (Top View)89Figure 25. Space Requirements for the Boxed Processor (Overall View)897.1.2 Boxed Processor Fan Heatsink Weight907.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly907.2 Electrical Requirements907.2.1 Fan Heatsink Power Supply90Figure 26. Boxed Processor Fan Heatsink Power Cable Connector Description91Table 32. Fan Heatsink Power and Signal Specifications91Figure 27. Baseboard Power Header Placement Relative to Processor Socket927.3 Thermal Specifications927.3.1 Boxed Processor Cooling Requirements92Figure 28. Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 1 View)93Figure 29. Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 2 View)937.3.2 Fan Speed Control Operation (Intel® Core™2 Extreme processors only)947.3.3 Fan Speed Control Operation (Intel® Core™2 Quad processor)94Figure 30. Boxed Processor Fan Heatsink Set Points95Table 33. Fan Heatsink Power and Signal Specifications958 Debug Tools Specifications978.1 Logic Analyzer Interface (LAI)978.1.1 Mechanical Considerations978.1.2 Electrical Considerations97Размер: 1,4 МБСтраницы: 98Язык: EnglishПросмотреть