Справочник ПользователяСодержаниеContents7List of Figures17List of Tables19About This Manual21Overview of Contents22Comments and Suggestions22Conventions Used in This Manual23Programming Issues27Introduction27The Petra ASIC and Second-Generation MVME1X7 Boards27Features29Applicable Industry Standards30Block Diagram30Programming Interfaces33MC680X0 MPU33Data Bus Structure33EEPROMs on the MVME1X7P34MVME16734MVME17735Flash Memory on the MVME17735SRAM36Onboard SDRAM37Battery-Backed-Up RAM and Clock38VMEbus Interface38I/O Interfaces38Serial Port Interface39Parallel (Printer) Interface40Ethernet Interface41SCSI Interface42Local Resources42Programmable Tick Timers42Watchdog Timer43Software-Programmable Hardware Interrupts43Local Bus Timeout43Functional Description43VMEbus Interface and VMEchip244VMEchip2 General-Purpose I/O44Petra/VMEchip2 Redundant Logic44Memory Maps46Local Bus Memory Map46Normal Address Range46Detailed I/O Memory Maps51BBRAM/TOD Clock Memory Map67Interrupt Acknowledge Map72VMEbus Memory Map72VMEbus Accesses to the Local Bus72VMEbus Short I/O Memory Map72Interrupt Handling73Example: VMEchip2 Tick Timer 1 Periodic Interrupt73Cache Coherency (MVME167P)75Cache Coherency (MVME177P)76Using Bus Timers77Indivisible Cycles78Supervisor Stack Pointer (MC68060)79Sources of Local Bus Errors80Local Bus Timeout80VMEbus Access Timeout80VMEbus BERR*80VMEchip281Bus Error Processing81Error Conditions81MPU Parity Error82MPU Offboard Error82MPU TEA - Cause Unidentified82MPU Local Bus Time-out83DMAC VMEbus Error83DMAC Parity Error83DMAC Offboard Error84DMAC LTO Error84DMAC TEA - Cause Unidentified85SCC Retry Error85SCC Parity Error86SCC Offboard Error86SCC LTO Error87LAN Parity Error87LAN Offboard Error87LAN LTO Error88SCSI Parity Error88SCSI Offboard Error88SCSI LTO Error89VMEchip291Introduction91Functional Blocks94Local-Bus-to-VMEbus Interface94Local-Bus-to-VMEbus Requester97VMEbus-to-Local-Bus Interface99Local-Bus-to-VMEbus DMA Controller100No-Address-Increment DMA Transfers102DMAC VMEbus Requester103Tick and Watchdog Timers104Prescaler104Tick Timers105Watchdog Timer105VMEbus Interrupter106VMEbus System Controller107Arbiter107IACK Daisy-Chain Driver107Bus Timer107Reset Driver108Local Bus Interrupter and Interrupt Handler108Global Control and Status Registers110LCSR Programming Model110Programming the VMEbus Slave Map Decoders116VMEbus Slave Ending Address Register 1118VMEbus Slave Starting Address Register 1118VMEbus Slave Ending Address Register 2119VMEbus Slave Starting Address Register 2119VMEbus Slave Address Translation Address Offset Register 1119VMEbus Slave Address Translation Select Register 1120VMEbus Slave Address Translation Address Offset Register 2121VMEbus Slave Address Translation Select Register 2121VMEbus Slave Write Post and Snoop Control Register 2122VMEbus Slave Address Modifier Select Register 2123VMEbus Slave Write Post and Snoop Control Register 1125VMEbus Slave Address Modifier Select Register 1126Programming the Local-Bus-to-VMEbus Map Decoders127Local Bus Slave (VMEbus Master) Ending Address Register 1129Local Bus Slave (VMEbus Master) Starting Address Register 1130Local Bus Slave (VMEbus Master) Ending Address Register 2130Local Bus Slave (VMEbus Master) Starting Address Register 2130Local Bus Slave (VMEbus Master) Ending Address Register 3131Local Bus Slave (VMEbus Master) Starting Address Register 3131Local Bus Slave (VMEbus Master) Ending Address Register 4131Local Bus Slave (VMEbus Master) Starting Address Register 4132Local Bus Slave (VMEbus Master) Address Translation Address Register 4132Local Bus Slave (VMEbus Master) Address Translation Select Register 4132Local Bus Slave (VMEbus Master) Attribute Register 4133Local Bus Slave (VMEbus Master) Attribute Register 3134Local Bus Slave (VMEbus Master) Attribute Register 2135Local Bus Slave (VMEbus Master) Attribute Register 1136VMEbus Slave GCSR Group Address Register137VMEbus Slave GCSR Board Address Register138Local-Bus-to-VMEbus Enable Control Register139Local-Bus-to-VMEbus I/O Control Register140ROM Control Register141Programming the VMEchip2 DMA Controller141DMAC Registers143EPROM Decoder, SRAM and DMA Control Register143Local-Bus-to-VMEbus Requester Control Register144DMAC Control Register 1 (bits 07)145DMAC Control Register 2 (bits 815)147DMAC Control Register 2 (bits 07)148DMAC Local Bus Address Counter149DMAC VMEbus Address Counter150DMAC Byte Counter150Table Address Counter150VMEbus Interrupter Control Register151VMEbus Interrupter Vector Register152MPU Status and DMA Interrupt Count Register152DMAC Status Register153Programming the Tick and Watchdog Timers154VMEbus Arbiter Time-Out Control Register154DMAC Ton/Toff Timers and VMEbus Global Time-out Control Register155VME Access, Local Bus, and Watchdog Time-out Control Register156Prescaler Control Register157Tick Timer 1 Compare Register158Tick Timer 1 Counter158Tick Timer 2 Compare Register159Tick Timer 2 Counter159Board Control Register160Watchdog Timer Control Register161Tick Timer 2 Control Register162Tick Timer 1 Control Register163Prescaler Counter163Programming the Local Bus Interrupter164Local Bus Interrupter Status Register (bits 2431)167Local Bus Interrupter Status Register (bits 1623)168Local Bus Interrupter Status Register (bits 815)169Local Bus Interrupter Status Register (bits 07)170Local Bus Interrupter Enable Register (bits 2431)171Local Bus Interrupter Enable Register (bits 1623)172Local Bus Interrupter Enable Register (bits 815)173Local Bus Interrupter Enable Register (bits 07)174Software Interrupt Set Register (bits 815)175Interrupt Clear Register (bits 2431)175Interrupt Clear Register (bits 1623)176Interrupt Clear Register (bits 815)177Interrupt Level Register 1 (bits 2431)177Interrupt Level Register 1 (bits 1623)178Interrupt Level Register 1 (bits 815)178Interrupt Level Register 1 (bits 07)179Interrupt Level Register 2 (bits 2431)179Interrupt Level Register 2 (bits 1623)180Interrupt Level Register 2 (bits 815)180Interrupt Level Register 2 (bits 07)181Interrupt Level Register 3 (bits 2431)181Interrupt Level Register 3 (bits 1623)182Interrupt Level Register 3 (bits 815)182Interrupt Level Register 3 (bits 07)183Interrupt Level Register 4 (bits 2431)183Interrupt Level Register 4 (bits 1623)184Interrupt Level Register 4 (bits 815)184Interrupt Level Register 4 (bits 07)185Vector Base Register185I/O Control Register 1186I/O Control Register 2187I/O Control Register 3187Miscellaneous Control Register188GCSR Programming Model190Programming the GCSR192VMEchip2 Revision Register193VMEchip2 ID Register194VMEchip2 LM/SIG Register194VMEchip2 Board Status/Control Register196General Purpose Register 0197General Purpose Register 1197General Purpose Register 2197General Purpose Register 3198General Purpose Register 4198General Purpose Register 5198PCCchip2199Introduction199Summary of Major Features199Functional Description200General Description200BBRAM Interface20182596CA LAN Controller Interface201MPU Port and MPU Channel Attention201MC68040-Bus Master Support for 82596CA202LANC Bus Error202LANC Interrupt20353C710 SCSI Controller Interface204Parallel Port Interface204General Purpose I/O Pin205CD2401 SCC Interface205Tick Timer207Overall Memory Map208Programming Model209Chip ID Register212Chip Revision Register212General Control Register213Vector Base Register214Programming the Tick Timers216Tick Timer 1 Compare Register216Tick Timer 1 Counter217Tick Timer 2 Compare Register217Tick Timer 2 Counter218Prescaler Count Register218Prescaler Clock Adjust Register218Tick Timer 2 Control Register220Tick Timer 1 Control Register221General Purpose Input Interrupt Control Register222General Purpose Input/Output Pin Control Register223Tick Timer 2 Interrupt Control Register223Tick Timer 1 Interrupt Control Register224SCC Error Status and Interrupt Control Registers225SCC Error Status Register225SCC Modem Interrupt Control Register226SCC Transmit Interrupt Control Register227SCC Receive Interrupt Control Register228Modem PIACK Register229Transmit PIACK Register230Receive PIACK Register231LANC Error Status and Interrupt Control Registers232LANC Error Status Register23282596CA LANC Interrupt Control Register233LANC Bus Error Interrupt Control Register234Programming the SCSI Error Status and Interrupt Registers235SCSI Error Status Register235SCSI Interrupt Control Register236Programming the Printer Port237Printer ACK Interrupt Control Register237Printer FAULT Interrupt Control Register238Printer SEL Interrupt Control Register239Printer PE Interrupt Control Register240Printer BUSY Interrupt Control Register241Printer Input Status Register242Printer Port Control Register243Chip Speed Register244Printer Data Register245Interrupt Priority Level Register246Interrupt Mask Level Register247MCECC Functions249Introduction249Features250Functional Description251General Description251Performance251Cache Coherency252ECC253Cycle Types253Error Reporting253Single Bit Error (Cycle Type = Burst Read or Non-Burst Read)253Double Bit Error (Cycle Type = Burst Read or Non-Burst Read)254Triple (or Greater) Bit Error (Cycle Type = Burst Read or Non-Burst Read)254Cycle Type = Burst Write254Single Bit Error (Cycle Type = Non-Burst Write)254Double Bit Error (Cycle Type = Non-Burst Write)254Triple (or Greater) Bit Error (Cycle Type = Non-Burst Write)255Single Bit Error (Cycle Type = Scrub)255Double Bit Error (Cycle Type = Scrub)255Triple (or Greater) Bit Error (Cycle Type = Scrub)255Error Logging256Scrub256Refresh256Arbitration257Chip Defaults257Programming Model258Chip ID Register261Chip Revision Register261Memory Configuration Register262Base Address Register263DRAM Control Register263BCLK Frequency Register264Data Control Register265Scrub Control Register267Scrub Period Register Bits 15-8268Scrub Period Register Bits 7-0268Chip Prescaler Counter269Scrub Time On/Time Off Register269Scrub Prescaler Counter (Bits 21-16)271Scrub Prescaler Counter (Bits 15-8)271Scrub Prescaler Counter (Bits 7-0)272Scrub Timer Counter (Bits 15-8)272Scrub Timer Counter (Bits 7-0)273Scrub Address Counter (Bits 26-24)273Scrub Address Counter (Bits 23-16)274Scrub Address Counter (Bits 15-8)274Scrub Address Counter (Bits 7-4)274Error Logger Register275Error Address (Bits 31-24)276Error Address (Bits 23-16)276Error Address (Bits 15-8)277Error Address (Bits 7-4)277Error Syndrome Register278Defaults Register 1278Defaults Register 2280SDRAM Configuration Register281Initialization282Syndrome Decoding284Summary of Changes287Introduction287Printer and Serial Port Connections289Introduction289Connection Diagrams289Related Documentation299MCG Documents299Manufacturers’ Documents300Related Specifications301Index303Размер: 2,9 МБСтраницы: 316Язык: EnglishПросмотреть
