Справочник ПользователяСодержаниеNI 5102 User Manual1Support2Worldwide Technical Support and Product Information2National Instruments Corporate Headquarters2Worldwide Offices2Important Information3Warranty3Copyright3Trademarks3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Contents6About This Manual8Conventions Used in This Manual8Related Documentation9Chapter 1 Introduction10About Your NI 510210Acquiring Data with Your NI 510211Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware12Interactively Controlling your NI 5102 with the Scope Soft Front Panel12NI-SCOPE Driver13NI-DAQ API13NI Application Software13Using PXI with CompactPCI14Table 1-1. NI 5102 (PXI) J2 Pin Assignment15Optional Equipment15Chapter 2 Installation and Configuration16What You Need to Get Started16Unpacking17Installing the NI 510218Table 2-1. NI 5102 (USB) LED Patterns19Hardware Configuration19Chapter 3 Digitizer Basics20Understanding Digitizers20Nyquist Theorem20Figure 3-1. Aliased Sine Wave When Waveform is Under Sampled20Analog Bandwidth21Figure 3-2. Analog Bandwidth21Sample Rate22Figure 3-3. 1 MHz Sine Wave Sample22Vertical Sensitivity23Figure 3-4. Transfer Function of a 3-Bit ADC23ADC Resolution23Record Length23Triggering Options24Making Accurate Measurements24Figure 3-5. Dynamic Range of an 8-Bit ADC with Three Different Gain Settings25Understanding the Probe and Its Effects onYourWaveform27Passive Probe27Figure 3-6. Typical X10 Probe27How to Compensate Your Probe28Figure 3-7. Connecting the Probe Compensation Cabling29Figure 3-8. Probe Compensation Comparison30Active and Current Probes30Chapter 4 Hardware Overview31Figure 4-1. NI 5102 (PCI, PXI, ISA) Block Diagram31Figure 4-2. NI 5102 (PCMCIA, USB) Block Diagram32I/O Connector32Figure 4-3. NI 5102 (PCI, ISA) I/O Connectors33Figure 4-4. NI 5102 (PCMCIA) I/O Connectors33Figure 4-5. NI 5102 (USB) I/O Connectors34Figure 4-6. NI 5102 (PXI) I/O Connectors35Signal Connections35Table 4-1. I/O Connector Signal Descriptions35Serial Communications Port (AUX)36Analog Input36Table 4-2. CH0 and CH1 Input Ranges36Table 4-3. AC/DC Coupling Change Settling Rates with NI Probes37ADC Pipeline Delay38Figure 4-7. Scan Clock Delay38Acquisition Modes38Posttrigger Acquisition38Table 4-4. Possible Number of Samples for Posttriggered Scans39Figure 4-8. Posttrigger Acquisition39Table 4-5. Posttrigger Acquisition Signals40Pretrigger Acquisition41Table 4-6. Possible Number of Samples for Pretriggered Mode41Figure 4-9. Pretrigger Acquisition42Table 4-7. Pretrigger Acquisition Signals43Trigger Sources44Figure 4-10. Scan Clock, Start Trigger, and Stop Trigger Signal Sources44Analog Trigger Circuit45Trigger Hold-off45Figure 4-11. Pretrigger and Posttrigger Acquisitions with Hold-off46Random Interleaved Sampling47Calibration47RTSI Bus Trigger and Clock Lines48Figure 4-12. RTSI Bus Trigger Lines49PFI Lines50PFI Lines as Inputs50PFI Lines as Outputs50Master/Slave Operation52Restrictions52Connecting Devices52Appendix A Specifications54Appendix B Technical Support Resources61Glossary63Numbers/Symbols63A63B64C65D67E69F70G-I71K-M73N74O-P75R77S78T80U-V81W-Z82Index83A-C83D-H84I-N85O-S86T-W87Размер: 671,6 КБСтраницы: 87Язык: EnglishПросмотреть
Справочник ПользователяСодержаниеNI 5102 User Manual1Support2Worldwide Technical Support and Product Information2National Instruments Corporate Headquarters2Worldwide Offices2Important Information3Warranty3Copyright3Trademarks3WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS3Contents6About This Manual8Conventions Used in This Manual8Related Documentation9Chapter 1 Introduction10About Your NI 510210Acquiring Data with Your NI 510211Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Your Hardware12Interactively Controlling your NI 5102 with the Scope Soft Front Panel12NI-SCOPE Driver13NI-DAQ API13NI Application Software13Using PXI with CompactPCI14Table 1-1. NI 5102 (PXI) J2 Pin Assignment15Optional Equipment15Chapter 2 Installation and Configuration16What You Need to Get Started16Unpacking17Installing the NI 510218Table 2-1. NI 5102 (USB) LED Patterns19Hardware Configuration19Chapter 3 Digitizer Basics20Understanding Digitizers20Nyquist Theorem20Figure 3-1. Aliased Sine Wave When Waveform is Under Sampled20Analog Bandwidth21Figure 3-2. Analog Bandwidth21Sample Rate22Figure 3-3. 1 MHz Sine Wave Sample22Vertical Sensitivity23Figure 3-4. Transfer Function of a 3-Bit ADC23ADC Resolution23Record Length23Triggering Options24Making Accurate Measurements24Figure 3-5. Dynamic Range of an 8-Bit ADC with Three Different Gain Settings25Understanding the Probe and Its Effects onYourWaveform27Passive Probe27Figure 3-6. Typical X10 Probe27How to Compensate Your Probe28Figure 3-7. Connecting the Probe Compensation Cabling29Figure 3-8. Probe Compensation Comparison30Active and Current Probes30Chapter 4 Hardware Overview31Figure 4-1. NI 5102 (PCI, PXI, ISA) Block Diagram31Figure 4-2. NI 5102 (PCMCIA, USB) Block Diagram32I/O Connector32Figure 4-3. NI 5102 (PCI, ISA) I/O Connectors33Figure 4-4. NI 5102 (PCMCIA) I/O Connectors33Figure 4-5. NI 5102 (USB) I/O Connectors34Figure 4-6. NI 5102 (PXI) I/O Connectors35Signal Connections35Table 4-1. I/O Connector Signal Descriptions35Serial Communications Port (AUX)36Analog Input36Table 4-2. CH0 and CH1 Input Ranges36Table 4-3. AC/DC Coupling Change Settling Rates with NI Probes37ADC Pipeline Delay38Figure 4-7. Scan Clock Delay38Acquisition Modes38Posttrigger Acquisition38Table 4-4. Possible Number of Samples for Posttriggered Scans39Figure 4-8. Posttrigger Acquisition39Table 4-5. Posttrigger Acquisition Signals40Pretrigger Acquisition41Table 4-6. Possible Number of Samples for Pretriggered Mode41Figure 4-9. Pretrigger Acquisition42Table 4-7. Pretrigger Acquisition Signals43Trigger Sources44Figure 4-10. Scan Clock, Start Trigger, and Stop Trigger Signal Sources44Analog Trigger Circuit45Trigger Hold-off45Figure 4-11. Pretrigger and Posttrigger Acquisitions with Hold-off46Random Interleaved Sampling47Calibration47RTSI Bus Trigger and Clock Lines48Figure 4-12. RTSI Bus Trigger Lines49PFI Lines50PFI Lines as Inputs50PFI Lines as Outputs50Master/Slave Operation52Restrictions52Connecting Devices52Appendix A Specifications54Appendix B Technical Support Resources61Glossary63Numbers/Symbols63A63B64C65D67E69F70G-I71K-M73N74O-P75R77S78T80U-V81W-Z82Index83A-C83D-H84I-N85O-S86T-W87Размер: 671,6 КБСтраницы: 87Язык: EnglishПросмотреть
