Panasonic MN101C77C 用户手册
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Chapter 7 16-bit Timer
16-bit Timer Synchronous Output
7-8
16-bit Timer Synchronous Output
7-8-1
Operation
When the binary counter of the timer reaches the set value of the compare register, the latched data is
output from port 6 at the next count clock.
output from port 6 at the next count clock.
Synchronous Output Operation by 16-bit Timer (Timer 7)
The port 6 latched data is output from the output pin at the interrupt request generation by the match of the
binary counter (TM7OC1) or by the full count overflow.
Only port 6 can perform synchronous output operation, and individual pins can be set.
binary counter (TM7OC1) or by the full count overflow.
Only port 6 can perform synchronous output operation, and individual pins can be set.
Count Timing of Synchronous Output (Timer 7)
The port 6 latched data is output from the output pin in synchronization with the interrupt request
generation by the match of a binary counter and a compare register 1.
generation by the match of a binary counter and a compare register 1.
Figure 7-8-1 Count Timing of Synchronous Output (Timer 7)
N
0000 0001
N-1
N
Count
clock
clock
TM7EN
flag
flag
Compare
register 1
register 1
Binary
counter
counter
Interrupt
request flag
request flag
0000 0001
N-1
Y
0000 0001
N-1
N
N
N-1
Port 6
synchronous
output data
synchronous
output data
X
Z
Y
Port 6 output
latched data
latched data
X
Z
Y
X
Y