Intel Desktop Board DP55WG, 10-Pack BLKDP55WG-10PACK 用户手册

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The Intel P55 Express Chipset consisting of the Intel P55 Express Platform Controller 
Hub (PCH) provides interfaces to the processor and the USB, SATA, LPC, LAN, PCI, 
and PCIe interfaces.  The PCH is a centralized controller for the board’s I/O paths. 

 

The Intel P55 Express Chipset 

http://www.intel.com/products/desktop/chipsets/index.htm

 

Resources used by the chipset  

Chapter 2 

The board supports up to fourteen USB 2.0 ports, supports EHCI, and has two internal 
hubs (RMH) that allow the use of EHCI-compatible drivers.   

The PCH provides the USB controller for all ports.  The port arrangement is as follows: 
•  Eight ports are implemented with stacked back panel connectors 
•  Three internal headers that support six additional ports 

 

The location of the USB connectors on the back panel 

The location of the front panel USB headers 

 

The board provides six internal SATA connectors through the PCH, which support one 
device per connector. 

The PCH provides independent SATA ports with a theoretical maximum transfer rate of 
3 Gb/s per port.  One device can be installed on each port for a maximum of six SATA 
devices.  A point-to-point interface is used for host to device connections, unlike 
Parallel ATA (PATA) IDE which supports a master/slave configuration and two devices 
per channel. 

For compatibility, the underlying SATA functionality is transparent to the operating 
system.  The SATA controller can operate in both legacy and native modes.  In legacy 
mode, standard IDE I/O and IRQ resources are assigned (IRQ 14 and 15).  In Native 
mode, standard PCI Conventional bus resource steering is used.  Native mode is the 
preferred mode for configurations using the Windows* XP, Windows Vista*, and 
Windows 7* operating systems.   

 

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The location of the SATA connectors