Excalibur electronic A-MNL-NIOSPROG-01.1 用户手册
Altera Corporation
79
32323232
32-Bit Instruction Set
2
3
2
-B
it In
st
st
ru
ctio
n
n
Se
t
t
RET
Equivalent to JMP %i7
Operation:
PC
← (%i7 << 1)
Assembler Syntax:
RET
Example:
RET ; return
RESTORE ; (restores caller’s register window)
Description:
Jump to the target-address given by (%i7
<< 1). Note that the target address will
always be half-word aligned for any value of %i7.
Condition Codes:
Flags: Unaffected
Delay Slot Behavior:
The instruction immediately following RET (RET’s delay slot) is executed after
RET, but before the destination instruction. There are restrictions on which
RET, but before the destination instruction. There are restrictions on which
instructions may be used as a delay slot (Refer to “Branch Delay Slots” on
page 23).
page 23).
Instruction Format:
Rw
Instruction Fields:
None (always uses %i7)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
N
V
Z
C
−
−
−
−