Philips S1D13505 用户手册

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Epson Research and Development

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S1D13505

Hardware Functional Specification

X23A-A-001-14

Issue Date: 01/02/02

REG[10h] bits 7-0

Screen 1 Start Address Bits [19:0]

REG[11h] bits 7-0

These registers form the 20-bit address for the starting word of the Screen 1 image in

REG[12h] bits 3-0

the display buffer.
Note that this is a word address.
A combination of this register and the Pixel Panning register (REG[18h]) can be used to uniquely
identify the start (top left) pixel within the Screen 1 image stored in the display buffer.

See “Display Configuration” for details.

REG[13h] bits 7-0

Screen 2 Start Address Bits [19:0]

REG[14h] bits 7-0

These registers form the 20-bit address for the starting word of the Screen 2 image in

REG[15h] bits 3-0

See “Display Configuration” for details.

Screen 1 Display Start Address Register 0

REG[10h]

Start Address
Bit 7

Start Address
Bit 6

Start Address
Bit 5

Start Address
Bit 4

Start Address
Bit 3

Start Address
Bit 2

Start Address
Bit 1

Start Address
Bit 0

Screen 1 Display Start Address Register 1

REG[11h]

Start Address
Bit 15

Start Address
Bit 14

Start Address
Bit 13

Start Address
Bit 12

Start Address
Bit 11

Start Address
Bit 10

Start Address
Bit 9

Start Address
Bit 8

Screen 1 Display Start Address Register 2

REG[12h]

n/a

Start Address
Bit 19

Start Address
Bit 18

Start Address
Bit 17

Start Address
Bit 16

Screen 2 Display Start Address Register 0

REG[13h]