Philips S1D13505 用户手册
Epson Research and Development
Page 145
Vancouver Design Center
Hardware Functional Specification
S1D13505
Issue Date: 01/02/02
X23A-A-001-14
Table 14-6: Theoretical Maximum Bandwidth M byte/sec, Cursor/Ink disabled
DRAM Type
1
(Speed Grade)
640x480 Display
Max. Pixel
Clock
(MHz)
(MHz)
Maximum Bandwidth (M byte/sec)
1 bpp
2 bpp
4 bpp
8 bpp
16 bpp
50ns
EDO-DRAM
MCLK = 40MHz
• CRT.
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual
Monochrome/Color Panel with Half
Frame Buffer Disabled.
Frame Buffer Disabled.
40 6.67
6.67
6.67
6.36
1.79
• Single Panel.
• Dual Monochrome/Color Panel with Half
Frame Buffer Disabled.
40 6.67
6.67
6.60
6.27
0.41
20
6.67
6.67
6.67
6.67
6.67
• Dual Monochrome Panel with Half Frame
Buffer Enabled.
40 6.27
5.11
-
-
-
20 6.67
6.67
6.67
6.67
3.94
13.3
6.67
6.67
6.67
6.67
6.67
• Simultaneous CRT + Dual Mono Panel
with Half Frame Buffer Enable.
40 6.36
5.44
-
-
-
• Dual Color Panel with Half Frame Buffer
Enabled.
20 6.67
6.67
6.27
6.27
-
13.3 6.67
6.67
6.67
6.67
6.67
60ns
EDO-DRAM
MCLK = 33MHz
• CRT.
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual
Monochrome/Color Panel with Half
Frame Buffer Disabled.
Frame Buffer Disabled.
33 5.5
5.5
5.5
5.24
1.47
• Single Panel.
• Dual Monochrome/Color Panel with Half
Frame Buffer Disabled.
33 5.5
5.5
5.5
5.17
0.34
16.5 5.5
5.5
5.5
5.5
5.5
• Dual Monochrome Panel with Half Frame
Buffer Enabled.
33 5.17
4.21
-
-
-
16.5 5.5
5.5
5.5
5.5
3.25
11
5.5
5.5
5.5
5.5
5.5
• Simultaneous CRT + Dual Monochrome
Panel with Half Frame Buffer Enable.
33 5.24
4.49
-
-
-
• Dual Color Panel with Half Frame Buffer
Enabled.
16.5 5.5
5.5
5.5
5.17
-
11
5.5
5.5
5.5
5.5
5.5