National Instruments 320174B-01 用户手册
Register-Level Programming
Chapter 4
Lab-NB User Manual
4-4
© National Instruments Corporation
Register Sizes
The Macintosh permits three different memory word sizes for memory read and write
operations–byte (8-bit), half-word (16-bit), and word (32-bit). Table 4-2 shows the word sizes of
the Lab-NB registers. For example, reading the A/D FIFO Register requires a 16-bit read
operation at the specified address.
operations–byte (8-bit), half-word (16-bit), and word (32-bit). Table 4-2 shows the word sizes of
the Lab-NB registers. For example, reading the A/D FIFO Register requires a 16-bit read
operation at the specified address.
Register Descriptions
Table 4-2 divides the Lab-NB registers into six different register groups. A bit description of
each of the registers making up these groups is included later in this chapter.
each of the registers making up these groups is included later in this chapter.
The Analog Input Register Group is used to read output from the 12-bit successive-
approximation ADC. The Analog Output Group accesses the two 12-bit DACs. The two
Counter/Timer Groups (A and B) are each made up of four registers—one group for each of the
two onboard 8253 Counter/Timer integrated circuits. The Digital I/O Register Group consists of
the four registers of the onboard 82C55A PPI integrated circuit used for digital I/O. The
Interrupt Control Register Group can be used to enable the interrupt facility on the Lab-NB
board.
approximation ADC. The Analog Output Group accesses the two 12-bit DACs. The two
Counter/Timer Groups (A and B) are each made up of four registers—one group for each of the
two onboard 8253 Counter/Timer integrated circuits. The Digital I/O Register Group consists of
the four registers of the onboard 82C55A PPI integrated circuit used for digital I/O. The
Interrupt Control Register Group can be used to enable the interrupt facility on the Lab-NB
board.
Warning:
During programming, note that each time a port is configured, output ports A
and C are reset to 0, and output port B is undefined.
and C are reset to 0, and output port B is undefined.
Register Description Format
The remainder of this register description chapter discusses each of the Lab-NB registers in the
order shown in Table 4-2. Each register group is introduced, followed by a detailed bit
description of each register. The individual register description gives the address, type, word
size, and bit map of the register, followed by a description of each bit.
order shown in Table 4-2. Each register group is introduced, followed by a detailed bit
description of each register. The individual register description gives the address, type, word
size, and bit map of the register, followed by a description of each bit.
The register bit map shows a diagram of the register with the MSB (bit 15 for a 16-bit register,
bit 7 for an 8-bit register) shown on the left, and the LSB (bit 0) shown on the right. A square is
used to represent each bit. Each bit is labeled with a name inside its square. An asterisk (*) after
the bit name indicates that the bit is inverted (negative logic).
bit 7 for an 8-bit register) shown on the left, and the LSB (bit 0) shown on the right. A square is
used to represent each bit. Each bit is labeled with a name inside its square. An asterisk (*) after
the bit name indicates that the bit is inverted (negative logic).
In many of the registers, several bits are labeled with an X, indicating don't care bits. When a
register is read, these bits may appear set or cleared but should be ignored because they have no
significance. When a register is written to, setting or clearing these bit locations has no effect on
the Lab-NB hardware.
register is read, these bits may appear set or cleared but should be ignored because they have no
significance. When a register is written to, setting or clearing these bit locations has no effect on
the Lab-NB hardware.
The bit map field for some write-only registers states not applicable, no bits used. Writing to
these registers causes some event to occur on the Lab-NB, such as clearing the analog input
circuitry. The data is ignored when writing to these registers; therefore, any bit pattern will
suffice.
these registers causes some event to occur on the Lab-NB, such as clearing the analog input
circuitry. The data is ignored when writing to these registers; therefore, any bit pattern will
suffice.