Motorola MVME162 用户手册
Debugger General Information
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MVME162 Embedded Controller Installation Guide
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Many times it may be desirable to terminate a debugger command prior to its
completion; for example, during the display of a large block of memory. Break
allows you to terminate the command.
completion; for example, during the display of a large block of memory. Break
allows you to terminate the command.
SYSFAIL* Assertion/Negation
Upon a reset/powerup condition the debugger asserts the VMEbus SYSFAIL*
line (refer to the VMEbus specification). SYSFAIL* stays asserted if any of the
following has occurred:
❏
line (refer to the VMEbus specification). SYSFAIL* stays asserted if any of the
following has occurred:
❏
confidence test failure
❏
NVRAM checksum error
❏
NVRAM low battery condition
❏
local memory configuration status
❏
self test (if system mode) has completed with error
❏
MPU clock speed calculation failure
After debugger initialization is done and none of the above situations have
occurred, the SYSFAIL* line is negated. This indicates to the user or VMEbus
masters the state of the debugger. In a multi-computer configuration, other
VMEbus masters could view the pertinent control and status registers to
determine which CPU is asserting SYSFAIL*. SYSFAIL* assertion/negation is
also affected by the ENV command. Refer to Appendix A.
occurred, the SYSFAIL* line is negated. This indicates to the user or VMEbus
masters the state of the debugger. In a multi-computer configuration, other
VMEbus masters could view the pertinent control and status registers to
determine which CPU is asserting SYSFAIL*. SYSFAIL* assertion/negation is
also affected by the ENV command. Refer to Appendix A.
MPU Clock Speed Calculation
The clock speed of the microprocessor is calculated and checked against a user
definable parameter housed in NVRAM (refer to the CNFG command in
Appendix A). If the check fails, a warning message is displayed. The calculated
clock speed is also checked against known clock speeds and tolerances.
definable parameter housed in NVRAM (refer to the CNFG command in
Appendix A). If the check fails, a warning message is displayed. The calculated
clock speed is also checked against known clock speeds and tolerances.
Memory Requirements
The program portion of 162Bug is approximately 512KB of code, consisting of
download, debugger, and diagnostic packages and contained entirely in Flash
or PROM.
download, debugger, and diagnostic packages and contained entirely in Flash
or PROM.
The 162Bug executes from $FF800000 whether in Flash or PROM. With jumper
at J22 pins 9-10 installed (factory ship configuration), the Flash memories
appear at address $FF800000 and are the parts executed during reset. With this
configuration, the PROM socket is mapped to address $FFA00000. If you
remove the jumper at J22 pins 9 and 10, the address spaces of the Flash and
PROM are swapped.
at J22 pins 9-10 installed (factory ship configuration), the Flash memories
appear at address $FF800000 and are the parts executed during reset. With this
configuration, the PROM socket is mapped to address $FFA00000. If you
remove the jumper at J22 pins 9 and 10, the address spaces of the Flash and
PROM are swapped.