National Instruments NI sbRIO-960x 用户手册
© National Instruments Corporation
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NI sbRIO-960x
The network settings are restored. You can reconfigure the settings in MAX
from a computer on the same subnet. Refer to the Measurement &
Automation Explorer Help for more information about configuring the
device.
from a computer on the same subnet. Refer to the Measurement &
Automation Explorer Help for more information about configuring the
device.
Note
If the device is restored to the factory network settings, the LabVIEW run-time
engine does not load. You must reconfigure the network settings and reboot the device for
the LabVIEW run-time engine to load.
the LabVIEW run-time engine to load.
Integrated 3.3 V Digital I/O
The four 40-pin IDC headers, P2–P5, provide connections for
110 low-voltage DIO channels, 82 DGND, and eight +5 V voltage outputs.
The following figure represents a single DIO channel.
110 low-voltage DIO channels, 82 DGND, and eight +5 V voltage outputs.
The following figure represents a single DIO channel.
Figure 12. Circuitry of One 3.3 V DIO Channel
I/O Protection
The 33
Ω current-limiting posistor, R1, and the protection diodes, D1 and
D2, protect each DIO channel against externally applied voltages of ±20 V
and ESD events. The combination of R1 and D1 protects against
overvoltage, and the combination of R1 and D2 protects against
undervoltage. The resistance of R1 increases rapidly with temperature.
and ESD events. The combination of R1 and D1 protects against
overvoltage, and the combination of R1 and D2 protects against
undervoltage. The resistance of R1 increases rapidly with temperature.
1
U1: 5 V to 3.3 V Level Shifter, SN74CBTD3384CDGV from Texas Instruments
2
D1 and D2: ESD Rated Protection Diodes, NUP4302MR6T1G from On Semiconductor
3
R1: Current-Limiting Posistor, PRG18BB330MS1RB from Murata
User
Connection
Spartan III FPGA
U1
+5 V
D2
D1
R1