Cypress CY7C1550V18 用户手册

Document Number: 001-06550 Rev. *E

Page 21 of 28

I

SB1

Automatic Power down 
Current

Max V

DD

, 

Both Ports Deselected, 
V

IN

 

≥ V

IH

 or V

IN

 

≤ V

IL

 

f = f

MAX

 = 1/t

CYC

,

 

Inputs Static

375MHz

(x8)

525

mA

(x9)

525

(x18)

525

(x36)

525

333MHz

(x8)

500

mA

(x9)

500

(x18)

500

(x36)

500

300MHz

(x8)

450

mA

(x9)

450

(x18)

450

(x36)

450

Over the Operating Range 

V

IH

Input HIGH Voltage

V

REF

 + 0.2

–

V

DDQ

 + 0.24

V

V

IL 

Input LOW Voltage

–0.24

–

V

REF

 – 0.2

V

Tested initially and after any design or process change that may affect these parameters.

C

IN

 Input 

Capacitance

T

A

 = 25

°C, f = 1 MHz, V

DD

 = 1.8V, V

DDQ 

= 1.5V

5.5

pF

C

CLK

Clock Input Capacitance

8.5

pF

C

O

Output Capacitance

8

pF

Tested initially and after any design or process change that may affect these parameters.

Θ

JA

Thermal Resistance
(Junction to Ambient)

Test conditions follow standard test methods and 
procedures for measuring thermal impedance, in 
accordance with EIA/JESD51.

11.82

°C/W

Θ

JC

Thermal Resistance
(Junction to Case)

2.33

°C/W

Over the Operating Range 

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