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EZ-USB FX2LP™ USB Microcontroller

 High-Speed USB Peripheral Controller

•

198 Champion Court

•

San Jose

,

CA 95134-1709

• 408-943-2600

Document #: 38-08032 Rev. *L

 Revised February 8, 2008

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USB 2.0 USB IF high-speed certified (TID # 40460272)

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Single chip integrated USB 2.0 transceiver, smart SIE, and 
enhanced 8051 microprocessor

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Fit, form and function compatible with the FX2

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Pin compatible

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Object-code-compatible

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Functionally compatible (FX2LP is a superset)

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Ultra Low power: I

CC

 no more than 85 mA in any mode

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Ideal for bus and battery powered applications

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Software: 8051 code runs from:

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Internal RAM, which is downloaded via USB

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Internal RAM, which is loaded from EEPROM

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External memory device (128 pin package)

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16 KBytes of on-chip Code/Data RAM

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Four programmable BULK/INTERRUPT/ISOCHRONOUS 
endpoints

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Buffering options: double, triple, and quad

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Additional programmable (BULK/INTERRUPT) 64 byte 
endpoint

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8-bit or 16-bit external data interface

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Smart Media Standard ECC generation

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GPIF (General Programmable Interface)

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Enables direct connection to most parallel interfaces

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Programmable waveform descriptors and configuration reg-
isters to define waveforms

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Supports multiple Ready (RDY) inputs and Control (CTL) out-
puts

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Integrated, industry standard enhanced 8051

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48 MHz, 24 MHz, or 12 MHz CPU operation

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Four clocks per instruction cycle

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Two USARTS

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Three counter/timers

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Expanded interrupt system

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Two data pointers

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3.3V operation with 5V tolerant inputs

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Vectored USB interrupts and GPIF/FIFO interrupts

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Separate data buffers for the Setup and Data portions of a 
CONTROL transfer

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Integrated I

2

C controller, runs at 100 or 400 kHz

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Four integrated FIFOs

❐

Integrated glue logic and FIFOs lower system cost

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Automatic conversion to and from 16-bit buses

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Master or slave operation

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Uses external clock or asynchronous strobes

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Easy interface to ASIC and DSP ICs

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Available in Commercial and Industrial temperature grade (all 
packages except VFBGA)