Cypress CY8C24223 用户手册

PSoC

®

 Programmable System-on-Chip™

•

198 Champion Court

•

San Jose

,

CA 95134-1709

•

408-943-2600

Document Number: 38-12011  Rev. *G

 Revised December 11, 2008

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Powerful Harvard Architecture Processor

❐

M8C Processor Speeds to 24 MHz

❐

8x8 Multiply, 32-Bit Accumulate

❐

Low Power at High Speed

❐

3.0 to 5.25 V Operating Voltage

❐

Operating Voltages Down to 1.0V Using On-Chip Switch 
Mode Pump (SMP)

❐

Industrial Temperature Range: -40°C to +85°C

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Advanced Peripherals (PSoC Blocks)

❐

Six Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 8-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators

❐

Four Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART
• Multiple SPI

™ Masters or Slaves

• Connectable to all GPIO Pins

❐

Complex Peripherals by Combining Blocks

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Precision, Programmable Clocking

❐

Internal ± 2.5% 24/48 MHz Oscillator

❐

High-Accuracy 24 MHz with Optional 32 kHz Crystal and PLL

❐

Optional External Oscillator, up to 24 MHz

❐

Internal Oscillator for Watchdog and Sleep

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Flexible On-Chip Memory

❐

4K Bytes Flash Program Storage 50,000 Erase/Write Cycles

❐

256 Bytes SRAM Data Storage

❐

In-System Serial Programming (ISSP

™)

❐

Partial Flash Updates

❐

Flexible Protection Modes

❐

EEPROM Emulation in Flash

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Programmable Pin Configurations

❐

25 mA Sink on all GPIO

❐

Pull up, Pull down, High Z, Strong, or Open Drain Drive 
Modes on all GPIO

❐

Up to 10 Analog Inputs on GPIO

❐

Two 30 mA Analog Outputs on GPIO

❐

Configurable Interrupt on all GPIO

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Additional System Resources

❐

I

2

C

™ Slave, Master, and Multi-Master to 400 kHz

❐

Watchdog and Sleep Timers

❐

User-Configurable Low Voltage Detection

❐

Integrated Supervisory Circuit

❐

On-Chip Precision Voltage Reference 

■

Complete Development Tools

❐

Free Development Software (PSoC Designer™)

❐

Full-Featured, In-Circuit Emulator and Programmer

❐

Full Speed Emulation

❐

Complex Breakpoint Structure

❐

128K Bytes Trace Memory

SRAM

256 Bytes

Interrupt

Controller

Sleep and 
Watchdog

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

Global Digital Interconnect

Global Analog Interconnect

SROM

Flash 4K

Multiply 
Accum.

Switch 

Mode 

Pump

Internal 
Voltage 

Ref.

Digital 

Clocks

POR and LVD

System Resets

Decimator

 Analog 

Ref

 Analog 

Input 

Muxing

I

2

C

(1 Rows, 

4 Blocks)

Port 2

Port 1

Port 0

Analog 
Drivers

System Bus

(2 Columns, 

6 Blocks)