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页码 31
CY8C24223A, CY8C24423A
PSoC
®
 Programmable System-on-Chip™
Cypress Semiconductor Corporation
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Document Number: 3-12029  Rev. *E
 Revised December 11, 2008
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 12 MHz
8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
4.75V to 5.25V Operating Voltage
Extended Temperature Range: -40°C to +125°C
Advanced Peripherals (PSoC Blocks)
Six Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
Four Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART
• Multiple SPI
™ Masters or Slaves
• Connectable to all GPIO Pins
Complex Peripherals by Combining Blocks
Precision, Programmable Clocking
Internal ± 4% 24 MHz Oscillator
High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL
Optional External Oscillator, up to 24 MHz
Internal Oscillator for Watchdog and Sleep
Flexible On-Chip Memory
4K Bytes Flash Program Storage 100 Erase/Write Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
Programmable Pin Configurations
25 mA Sink on All GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive 
Modes on All GPIO
Up to Ten Analog Inputs on GPIO
Two 30 mA Analog Outputs on GPIO
Configurable Interrupt on All GPIO
Additional System Resources
I
2
C
™ Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference 
Complete Development Tools
Free Development Software (PSoC Designer™)
Full-Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Bytes Trace Memory
DIGITAL  SYSTEM
SRAM
256 Bytes
Interrupt
Controller
Sleep and
Watchdog
Multiple  Clock  Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM
Flash 4K
Digital
Block  Array
Multiply
Accum.
Internal
Voltage
Ref.
Digital
Clocks
POR and LVD
System Resets
Decimator
SYSTEM RESOURCES
ANALOG  SYSTEM
 Analog
Ref
 Analog
Input
Muxing
I
2
C
(1 Row,
4 Blocks)
Port 2
Port 1
Port 0
Analog
Drivers
System Bus
Analog
Block
Array
(2 Columns,
6 Blocks)
Logic Block Diagram