Cypress CY7C6435x 用户手册

enCoRe™ V Full Speed USB Controller

•

198 Champion Court

•

San Jose

,

CA 95134-1709

•

408-943-2600

Document Number: 001-12394 Rev *G

 Revised January 30, 2009

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Powerful Harvard Architecture Processor

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M8C processor speeds running up to 24 MHz

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Low power at high processing speeds

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Interrupt controller

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3.0V to 5.5V operating voltage without USB

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Operating voltage with USB enabled:
• 3.15 to 3.45V when supply voltage is around 3.3V
• 4.35 to 5.25V when supply voltage is around 5.0V

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Temperature range: 0°C to 70°C

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Flexible On-Chip Memory

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Up to 32K Flash program storage 
• 50,000 erase and write cycles
• Flexible protection modes

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Up to 2048 bytes SRAM data storage

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In-System Serial Programming (ISSP)

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Complete Development Tools

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Free development tool (PSoC Designer™)

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Full featured, in-circuit emulator and programmer

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Full speed emulation

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Complex breakpoint structure

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128K trace memory

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Precision, Programmable Clocking

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Crystal-less oscillator with support for an external crystal or 
resonator

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Internal ±5.0% 6, 12, or 24 MHz main oscillator
• 0.25% accuracy with Oscillator Lock to USB data, no

external components required

• Internal low speed oscillator at 32 kHz for watchdog and 

sleep. The frequency range is 19 to 50 kHz with a 32 kHz 
typical value

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Programmable Pin Configurations

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25 mA sink current on all GPIO 

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Pull Up, High Z, Open Drain, CMOS drive modes on all GPIO

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Configurable inputs on all GPIO

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Low dropout voltage regulator for Port 1 pins. Programmable 
to output 3.0, 2.5, or 1.8V at the I/O pins

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Selectable, regulated digital I/O on Port 1
• Configurable input threshold for Port 1
• 3.0V, 20 mA total Port 1 source current
• Hot-swappable 

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5 mA strong drive mode on Ports 0 and 1

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Full-Speed USB (12 Mbps)

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Eight unidirectional endpoints

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One bidirectional control endpoint

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USB 2.0 compliant

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Dedicated 512 bytes buffer

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No external crystal required

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Additional System Resources

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Configurable communication speeds

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I

2

C slave 

• Selectable to 50 kHz, 100 kHz, or 400 kHz

• Implementation requires no clock stretching
• Implementation during sleep modes with less than 100 

μA

• Hardware address detection

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SPI master and SPI slave
• Configurable between 93.75 kHz and 12 MHz

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Three 16-bit timers

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8-bit ADC used to monitor battery voltage or other signals - 
with external components

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Watchdog and sleep timers

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Integrated supervisory circuit

System Bus

(M8C)

SROM

Flash 32K

I2C Slave/SPI

Master-Slave

POR and LVD

System Resets

Port 1

Port 0

Sleep and

Watchdog

Full 

Speed

USB

Port 3

Port 2

Prog. LDO

SRAM 

2048 Bytes

Interrupt

Controller

3 16-Bit

Timers

Port 4