Cypress CY14B108N 用户手册
PRELIMINARY
CY14B108L, CY14B108N
8 Mbit (1024K x 8/512K x 16) nvSRAM
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document #: 001-45523 Rev. *B
Revised March 19, 2009
Features
■
20 ns, 25 ns, and 45 ns Access Times
■
Internally organized as 1024K x 8 (CY14B108L) or 512K x 16
(CY14B108N)
■
Hands off Automatic STORE on power down with only a small
Capacitor
■
STORE to QuantumTrap
®
nonvolatile elements initiated by
Software, device pin, or AutoStore
®
on power down
■
RECALL to SRAM initiated by Software or power up
■
Infinite Read, Write, and RECALL Cycles
■
200,000 STORE cycles to QuantumTrap
■
20 year data retention
■
Single 3V +20
%, -10% operation
■
Commercial and Industrial Temperatures
■
48-ball FBGA and 44-pin and 54-pin TSOP-II packages
■
Pb-free and RoHS compliant
Functional Description
The Cypress CY14B108L/CY14B108N is a fast static RAM, with
a nonvolatile element in each memory cell. The memory is
organized as 1024 Kbytes of 8 bits each or 512K words of 16 bits
each. The embedded nonvolatile elements incorporate
QuantumTrap technology, producing the world’s most reliable
nonvolatile memory. The SRAM provides infinite read and write
cycles, while independent nonvolatile data resides in the highly
reliable QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
STATIC RAM
ARRAY
2048 X 2048 X 2
R
O
W
D
E
C
O
D
E
R
COLUMN I/O
COLUMN DEC
I
N
P
U
T
B
U
F
F
E
R
S
POWER
CONTROL
STORE/RECALL
CONTROL
Quatrum Trap
2048 X 2048 X 2
STORE
RECALL
V
CC
V
CAP
HSB
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
SOFTWARE
DETECT
A
14
- A
2
OE
CE
WE
BHE
BLE
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
17
A
18
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
DQ
8
DQ
9
DQ
10
DQ
11
DQ
12
DQ
13
DQ
14
DQ
15
A
19
Logic Block Diagram
Note
1. Address A
0
- A
19
for x8 configuration and Address A
0
- A
18
for x16 configuration.
2. Data DQ
0
- DQ
7
for x8 configuration and Data DQ
0
- DQ
15
for x16 configuration.
3. BHE and BLE are applicable for x16 configuration only.