Texas Instruments TMS320 DSP 用户手册

6.2

Algorithm and Framework

6.3

Requirements for the Use of the DMA Resource

6.4

Logical Channel

6.5

Data Transfer Properties

6.6

Data Transfer Synchronization

6.7

Abstract Interface

6.8

Resource Characterization

6.9

Runtime APIs

6.10

Strong Ordering of DMA Transfer Requests

6.11

Submitting DMA Transfer Requests

6.12

Device Independent DMA Optimization Guideline

6.13

C6xxx Specific DMA Rules and Guidelines

6.13.1

Cache Coherency Issues for Algorithm Producers

6.14

C55x Specific DMA Rules and Guidelines

6.14.1

Supporting Packed/Burst Mode DMA Transfers

6.14.2

Minimizing Logical Channel Reconfiguration Overhead

6.14.3

Addressing Automatic Endianism Conversion Issues

6.15

Inter-Algorithm Synchronization

6.15.1

Non-Preemptive System

6.15.3

Preemptive System

A.1

General Rules

A.2

Performance Characterization Rules

A.3

DMA Rules

A.4

General Guidelines

A.5

DMA Guidelines

B.1

TI C-Language Run-Time Support Library

B.2

DSP/BIOS Run-time Support Library

C.1

Books

C.2

D.1

Glossary of Terms

SPRU352G – June 2005 – Revised February 2007

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