Fujitsu FR81S 用户手册
CHAPTER 28: REAL-TIME CLOCK(RTC)
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: REAL-TIME CLOCK(RTC)
FUJITSU SEMICONDUCTOR CONFIDENTIAL
16
(2) -Write the values of Day/ Hour/ Minute/ Second to Day/ Hour/ Minute/ Second registers: WTDR, WTHR,
WTMR, WTSR by software.
-Write "0F
H
", "42
H
", "3F
H
" to sub-second registers: WTBRH, WTBRM, WTBRL by software.
-Initialize the interrupt request bits (INT0, INT1, INT2, INT3, INT4), and set the interrupt request enable bits
(INTE0, INTE1, INTE2, INTE3, INTE4) (enable interrupts to be used).
(3) Set the start bit (ST) to "1".
(4) Use the start bit (ST="1") to load the values in the Day/ Hour/ Minute/ Second registers: WTDR, WTHR,
WTMR, WTSR to the Day/ Hour/ Minute/ Second timers.
(5) Moreover, as the count value of the sub-second counter (22-bit down counter) is "000000
H
", load the values in
second registers: WTBRH, WTBRM, WTBRL to the sub-second counter (22-bit down counter).
(6) The operation flag (RUN) becomes "1".
(7) The sub-second counter (22-bit down counter) starts to count using a clock obtained by dividing the main
clock frequency by 2 (4/2MHz).
(8) When the sub-second counter(22-bit down counter) becomes "000000
H
", load the sub-second register value
"0F423F
H
" to the sub-second counter(22-bit down counter).
In addition, an interrupt request of 0.5 second counter occurs.
Moreover, when the real-time clock output enable is set (WOT pin output enable), an "H" level with a width
twice as long as that of the main clock is output to the WOT pin.
(Example: For main clock 4MHz, "H" output with a width of 500ns )
(9) After the 0.5 second counter is counted up, it is cleared at the next count up, the second counter of the Day/
Hour/ Minute/ Second counters is counted up, and a second interrupt request occurs.
(10) The second counter of the Day/ Hour/ Minute/ Second counters is counted up, it is cleared at the next count
up when the value is "59", the minute counter is counted up, and the minute interrupt request occurs at this
time.
(11) The minute counter of Day/ Hour/ Minute/ Second counters is counted up, it is cleared at the next count up
when the value is "59", the hour counter is counted up, and the hour interrupt request occurs at this time.
(12) The hour counter of the Day/ Hour/ Minute/ Second counters is counted up, it is cleared at the next count up
when the value is "23", the day counter is counted up, and the day interrupt request occurs at this time.
(13) The day counter of the Day/ Hour/ Minute/ Second counters is counted up, it is cleared at the next count up
when the value is "65535".
(14) Move to the watch mode by software.
The real-time clock will continue to run in the watch mode.
(15) Input a signal from an interrupt pin (INTxx) to restore from the watch mode and restart CPU.
(16) Set the start bit (ST) to "0".
(17) Use the start bit ST="0" to clear(reset) the sub-second counter (22-bit down counter) and the Day/ Hour/
Minute/ Second counters, and then stop them.
MB91520 Series
MN705-00010-1v0-E
1055