Fujitsu FR81S 用户手册
CHAPTER 36: EXTERNAL BUS INTERFACE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
27
5.2.4. Address/Data multiplexed bus write protocol
This section shows the protocol for write access using an address/data multiplexed bus.
Figure 5-4 Address/data multiplexed bus (Write operation example)
A
0
D
0
7
0
6
5
4
3
2
1
C
S
n
X
(n=0,1
,2,3)
W
RnX
(n=0,1
)
D
x
x
cycle
no
.
S
Y
S
CL
K
AS
X
H: Dxx is input
L: Dxx is output
L: Dxx is output
MB91520 Series
MN705-00010-1v0-E
1226