Fujitsu FR81S 用户手册
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
37
4.2.6. A/D Activation Trigger Extend Control Register :
ADTECS0 to ADTECS47
The bit configuration of the A/D activation trigger extend control register is shown.
The A/D activation trigger extend control register (ADTECS) selects the activation factor select and the analog
input channel.
ADTECS0 to ADTECS31: Address 13CC
H
to 140A
H
(Access: Byte, Half-word,
Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved
STS2
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved Reserved Reserved CHSEL4
CHSEL3
CHSEL2
CHSEL1
CHSEL0
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R/W
R/W
R/W
R/W
R/W
[bit15 to bit9] Reserved
These bits must always be written to "0".
[bit8] STS2 : A/D activation factor select bit
The activation factor of the A/D conversion is selected by the this bit and the bit12, bit11 (STS1,STS0) of
A/D activation trigger control status register (ADTCS). Please refer to "4.2.4. A/D Activation Trigger
Control Status Register : ADTCS0 to ADTCS47" for details.
Notes:
Since the activation factor select bit changes immediately when the bits are rewritten, change this bit
while the current target and target activation factor are inactive and the A/D conversion is not being
requested (ADTCS:BUSY=1).
Please set these bits including ADTCS.STS1 and ADTCS.STS0 as software activation ("000B"), and set
a corresponding bit of ADTSE (activation channel) to the software activation disable (ADT bit =0) when
A/D conversion is not being requested.
Please confirm the 16-bit free-run timer has stopped whenever the A/D activation factor select bit is set.
[bit7 to bit5] Reserved
These bits must always be written to "0".
MB91520 Series
MN705-00010-1v0-E
1840