Fujitsu FR81S 用户手册
CHAPTER 48: WAVEFORM GENERATOR
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : WAVEFORM GENERATOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
24
Notes:
To cancel the noise pulse width, you will need an approximately 2n peripheral clock.
If you select the noise cancel circuit, the input will be invalidated while it is in the mode that the peripheral
clock is inactive (i.e. stop mode).
[bit4 to bit2] DCK2 to DCK0: Operating clock selection bits
DCK2
DCK1
DCK0
Function
0
0
0
φ
0
0
1
φ
/2
0
1
0
φ
/4
0
1
1
φ
/8
1
0
0
φ
/16
1
0
1
φ
/32
1
1
0
φ
/64
1
1
1
Setting prohibited
φ
: Peripheral clock
⋅
These bits are used to select the operating clock for the 16-bit dead timer.
[bit1, bit0] NWS1, NMS0: DTTI noise width selection bits
NWS1
NWS0
Function
0
0
Cancel the 4-peripheral clock cycle noise
0
1
Cancel the 8-peripheral clock cycle noise
1
0
Cancel the 16-peripheral clock cycle noise
1
1
Cancel the 32-peripheral clock cycle noise
⋅
These bits are used to select the DTTI pin noise pulse width to be removed.
MB91520 Series
MN705-00010-1v0-E
2069