Emerson MVME7100 用户手册

MVME7100 Single Board Computer Installation and Use (6806800E08A)

Functional Description

System Clock

4.13.1

System Clock

The system clock is driven by an oscillator. The following table defines the clock frequencies for
various configurations.

4.13.2

Real Time Clock Input

The RTC clock input is driven by a 1 MHz clock generated by the Control and Timers PLD. This
provides a fixed clock reference for the MC864xD PIC timers which software can use as a
known timing reference.

4.13.3

Local Bus Controller Clock Divisor

The Local Bus Controller (LBC) clock output is connected to the PLD but is not used by the
internal logic

4.14

Reset Control Logic

There are multiple sources of reset on the MVME7100. The following sources generate a board
level reset:

Power-up

Reset switch

Watchdog timer

System control register (BRD_RST)

VMEbus reset

A board level hard reset generates a reset for the entire SBC including the processor, local
PCI/PCI-X buses, Ethernet PHYs, serial ports, flash devices, and PLD(s). If the MVME7100 is
configured as the VME system controller, the VMEbus and local Tsi148 reset input are also
reset.

4.15

Real Time Clock Battery

There is an on-board battery holder that provides easy replacement of a +3.0 V button cell
lithium battery (BR2325) which provides back-up power to the on-board Real Time Clock. A
battery switching circuit provides automatic switching between the +3.3 V and battery voltages.

Table 4-1 Clock Frequencies

SYSCLK

Core

MPX (Platform)

DDR2

66.67 MHz

1.3 GHz

533 MHz

266 MHz

66.67 MHz

1.067 GHz

533 MHz

266 MHz