National Instruments NI 5620 用户手册
Chapter 2
Hardware Overview
2-8
ni.com
Synchronizing Multiple PXI Devices
The NI 5620 uses a PLL to synchronize the 64 MHz sample clock to a
10 MHz reference clock. You can either supply the reference clock through
the SMA connector (REF CLK IN) on the front panel or use the system
reference clock on the PXI backplane.
10 MHz reference clock. You can either supply the reference clock through
the SMA connector (REF CLK IN) on the front panel or use the system
reference clock on the PXI backplane.
The PXI bus and the NI 5620 have the following timing and triggering
features that you can use for synchronizing multiple digitizers:
features that you can use for synchronizing multiple digitizers:
•
System Reference Clock—This is a 10 MHz clock on the PXI
backplane with ±100 ppm accuracy. It is independently distributed to
each PXI peripheral slot through equal-length traces with a skew of
less than 1 ns between slots. Multiple devices can use this common
timebase for synchronization. This allows each NI 5620 to phase lock
to the system reference clock.
backplane with ±100 ppm accuracy. It is independently distributed to
each PXI peripheral slot through equal-length traces with a skew of
less than 1 ns between slots. Multiple devices can use this common
timebase for synchronization. This allows each NI 5620 to phase lock
to the system reference clock.
•
SMA connector (REF CLK IN)—This is a 10 MHz reference input
that you can use to connect your external frequency source for
synchronization.
that you can use to connect your external frequency source for
synchronization.