Motorola CPCI-6020 用户手册
MPU, Hardware and Firmware Initialization
Firmware
CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
109
3.
Clears all segment registers of the MPU.
4.
Clears all block address translation registers of the MPU.
5.
Initializes the MPU-bus-to-PCI-bus bridge device.
6.
Initializes the PCI-bus-to-ISA-bus bridge device.
7.
Calculates the external bus clock speed of the MPU.
8.
Delays for 750 milliseconds.
9.
Determines the CPU board type.
10. Sizes the local read/write memory (i.e., DRAM).
11. Initializes the read/write memory controller.
12. Sets base address of memory to $00000000.
13. Retrieves the speed of read/write memory.
14. Initializes the read/write memory controller with the speed of read/write memory.
15. Retrieves the speed of read only memory (i.e., flash) from NVRAM.
16. Initializes the read only memory controller with the speed of read only memory.
17. Enables the MPU's instruction cache.
18. Copies the MPU's exception vector table from $FFF00000 to $00000000.
19. Verifies MPU type.
20. Determines the debugger's console/host ports, and initializes the appropriate devices
(PC16550/GD54xx/Z85C230).
21. Displays the debugger's copyright message.
22. Displays any hardware initialization errors that may have occurred.
23. Checksums the debugger object, and displays a warning message if the checksum failed
to verify.
24. Displays the amount of local read/write memory found.
25. Verifies the configuration data that is resident in NVRAM, and displays a warning message
if the verification failed.
26. Calculates and displays the MPU clock speed, verifies that the MPU clock speed matches
the configuration data and displays a warning message if the verification fails.
27. Displays the BUS clock speed, verifies that the BUS clock speed matches the configuration
data and displays a warning message if the verification fails.
28. Probes PCI Bus for supported network devices.
29. Probes PCI Bus for supported mass storage devices.
30. Initializes the memory/IO addresses for the supported PCI Bus devices.
31. Executes Self-Test, if so configured. (Default is no Self-Test.)
32. Extinguishes the board fail LED, if there are no self-test failures or
initialization/configuration errors.