Motorola MVME5100 用户手册
2-84
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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
PPC Error Address Register
The Error Address Register (EADDR) captures addressing information on
the various errors that the PHB can detect. The register captures the PPC
address when the XBTO bit is set in the ESTAT register. The register
captures the PCI address when the PSMA or PRTA bits are set in the
ESTAT register. The register’s contents are not defined when the XDPE,
PPER or PSER bits are set in the ESTAT register.
the various errors that the PHB can detect. The register captures the PPC
address when the XBTO bit is set in the ESTAT register. The register
captures the PCI address when the PSMA or PRTA bits are set in the
ESTAT register. The register’s contents are not defined when the XDPE,
PPER or PSER bits are set in the ESTAT register.
Address
$FEFF0028
Bit
0 1 2 3 4 5 6 7 8 9
1
0
0
1
1
1
1
2
2
1
3
3
1
4
4
1
5
5
1
6
6
1
7
7
1
8
8
1
9
9
2
0
0
2
1
1
2
2
2
2
3
3
2
4
4
2
5
5
2
6
6
2
7
7
2
8
8
2
9
9
3
0
0
3
1
1
Name
EAADR
Operation
R
Reset
$00000000