Motorola MVME5100 用户手册
Registers
http://www.motorola.com/computer/literature
2-117
2
IPI Vector/Priority Registers
MASK
MASK. Setting this bit disables any further interrupts
from this source. If the mask bit is cleared while the bit
associated with this interrupt is set in the IPR, the interrupt
request will be generated.
from this source. If the mask bit is cleared while the bit
associated with this interrupt is set in the IPR, the interrupt
request will be generated.
ACT
ACTIVITY. The activity bit indicates that an interrupt
has been requested or that it is in-service. The ACT bit is
set to a one when its associated bit in the Interrupt Pending
Register or In-Service Register is set.
has been requested or that it is in-service. The ACT bit is
set to a one when its associated bit in the Interrupt Pending
Register or In-Service Register is set.
PRIOR
PRIORITY. Interrupt priority 0 is the lowest and 15 is
the highest. Note that a priority level of 0 will not enable
interrupts.
the highest. Note that a priority level of 0 will not enable
interrupts.
VECTOR VECTOR. This vector is returned when the Interrupt
Acknowledge register is examined during a request for
the interrupt associated with this vector.
the interrupt associated with this vector.
Offset
IPI 0 - $010A0
IPI 1 - $010B0
IPI 2 - $010C0
IPI 3 - $010D0
IPI 1 - $010B0
IPI 2 - $010C0
IPI 3 - $010D0
Bit
3
1
1
3
0
0
2
9
9
2
8
8
2
7
7
2
6
6
2
5
5
2
4
4
2
3
3
2
2
2
2
1
1
2
0
0
1
9
9
1
8
8
1
7
7
1
6
6
1
5
5
1
4
4
1
3
3
1
2
2
1
1
1
1
0 9 8 7 6 5 4 3 2 1 0
0 9 8 7 6 5 4 3 2 1 0
Name
IPI VECTOR/PRIORITY
MAS
K
AC
T
PRIOR
VECTOR
Operation
R/W
R
R
R/W
R
R/W
Reset
1
0
$000
$0
$00
$00