Motorola MVME5100 用户手册

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页码 330
3-64
Computer Group Literature Center Web Site
System Memory Controller (SMC)
3
I
2
C Clock Prescaler Register
I2_PRESCALE_VAL
I2_PRESCALE_VAL is a 16-bit register value that will 
be used in the following formula for calculating frequency 
of the I
2
C gated clock signal:
I
2
C CLOCK = SYSTEM CLOCK/ 
(I2_PRESCALE_VAL +1)/2
After power-up, I2_PRESCALE_VAL is initialized to 
$1F3 which produces a 100 KHz I
2
C gated clock signal 
based on a 100.0 MHz system clock. Writes to this 
register will be restricted to 4-bytes only.
I
2
C Control Register
i2_start
When set, the I
2
C master controller generates a start sequence 
on the I
2
C bus on the next write to the I
2
C Transmitter Data 
Register and clears the i2_cmplt bit in the I
2
C Status Register. 
After the start sequence and the I
2
C Transmitter Data Register 
contents have been transmitted, the I
2
C master controller will 
automatically clear the i2_start bit and then set the i2_cmplt 
bit in the I
2
C Status Register.
Address
$FEF80090
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
I2_PRESCALE_VAL
Operation
READ ZERO
READ ZERO
READ/WRITE
Reset
X
X
$01F3 P
Address
$FEF80098
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
0
0
0
0
i2_s
ta
rt
i2_s
to
p
i2_ac
kou
t
i2_en
b
l
Operation
READ ZERO
READ ZERO
READ ZERO
R R
R
R
R/W
R/W
R/W
R/W
Reset
X
X
X
X X
X
X
0 P
L
0 P
L
0 P
L
0 P
L